[lld-macho] Add test for a variety of arm64 relocations

[alexander-shaposhnikov]

lld/test/MachO/arm64-relocs.s

4

wouldn't llvm-objdump --syms --macho -d --section=__const %t be sufficient ? (+ reordering the checks)

[int3]

lld/test/MachO/arm64-relocs.s

4

I find it more natural to have the symbol table first, since everything is defined exactly once there. If OTOH the __const data was first, then we would have the first matching line defining BAZ and the second line checking that the value matches, which seems kind of misleading when we're really matching on the same output

19–20

(the comment above was talking about these two lines in particular)

[smeenai]

LGTM

lld/test/MachO/arm64-relocs.s

13

I imagine it's changing from 123 to 120 because the instruction (and presumably the relocation type) can only encode 4-byte aligned addresses, but can you add a comment explaining that?

14

Same here.

45

Do local symbols (as in symbols prefixed with L) do the trick?

[int3]

address comments

lld/test/MachO/arm64-relocs.s

45

Nope. From further investigation, it seems that UNSIGNED section relocations are only generated for compact unwind sections in arm64. So to test that case, I'll extend the compact unwind test to cover arm64.

lld/test/MachO/arm64-relocs.s

+# REQUIRES: arm
+# RUN: llvm-mc -filetype=obj -triple=arm64-apple-darwin %s -o %t.o
+# RUN: %lld -dylib -arch arm64 -lSystem -o %t %t.o
+# RUN: (llvm-objdump --syms %t; llvm-objdump --macho -d --section=__const %t) | FileCheck %s
+
+# CHECK-LABEL: SYMBOL TABLE:
+# CHECK-DAG:   [[#%x,PTR_1:]] l     O __DATA_CONST,__const _ptr_1
+# CHECK-DAG:   [[#%x,PTR_2:]] l     O __DATA_CONST,__const _ptr_2
+# CHECK-DAG:   [[#%x,BAR:]]   g     F __TEXT,__text _bar
+# CHECK-DAG:   [[#%x,BAZ:]]   g     O __DATA,__data _baz
+
+# CHECK-LABEL: _foo:
+# CHECK-NEXT:  bl 0x[[#BAR+120]]
+# CHECK-NEXT:  adrp x2, [[#]] ; 0x[[#BAZ+4096-128]]
+# CHECK-NEXT:  ldr  x2, [x2, #128]
+# CHECK-NEXT:  ret
+
+# CHECK-LABEL: Contents of (__DATA_CONST,__const) section
+# CHECK:       [[#PTR_1]] {{0*}}[[#BAZ]] 00000000 00000000 00000000
+# CHECK:       [[#PTR_2]] {{0*}}[[#BAZ]] 00000000 00000000 00000000
+
+.text
+.globl _foo, _bar, _baz
+.p2align 2
+_foo:
+  ## Generates ARM64_RELOC_BRANCH26 and ARM64_RELOC_ADDEND
+  bl _bar + 123
+  ## Generates ARM64_RELOC_PAGE21 and ADDEND
+  adrp x2, _baz@PAGE + 4097
+  ## Generates ARM64_RELOC_PAGEOFF12
+  ldr x2, [x2, _baz@PAGEOFF]
+  ret
+
+.p2align 2
+_bar:
+  ret
+
+.data
+.space 128
+_baz:
+.space 1
+
+.section __DATA_CONST,__const
+## These generate ARM64_RELOC_UNSIGNED symbol relocations
+## XXX: how to generate UNSIGNED section relocations?
+_ptr_1:
+  .quad _baz
+  .space 8
+_ptr_2:
+  .quad _baz
+  .space 8
+
+.subsections_via_symbols