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[AMDGPU] Add new CostPerUse values for VGPRs
Needs RevisionPublic

Authored by cdevadas on Feb 1 2021, 9:39 AM.

Details

Reviewers
arsenm
Summary

We introduced more scratch VGPRs with D76356.
To yield a better occupancy, the CSRs and
the scratch registers were interleaved at a
regular interval.

This patch is to have a balanced allocation of
both CSRs and scratch registers by setting high
cost value for higher indices. This should improve the
cases that ended up with a higher register usage when
one set of VGPRs (either CSR or scratch) is over
allocated than the other.

With D86836 targets can support multiple cost models.
The new cost values will be applied only in the presence
of a calling convention. Otherwise, the default
cost model will be used.

Diff Detail

Event Timeline

cdevadas created this revision.Feb 1 2021, 9:39 AM
cdevadas requested review of this revision.Feb 1 2021, 9:39 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 1 2021, 9:39 AM
arsenm requested changes to this revision.Mar 30 2021, 3:55 PM
arsenm added inline comments.
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
159

Comment is wrong, kernel *is* a calling convention

llvm/lib/Target/AMDGPU/SIRegisterInfo.td
284

Needs a comment explaining the cost. Also space around =

This revision now requires changes to proceed.Mar 30 2021, 3:55 PM