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Differential D93123

[MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics
ClosedPublic

Authored by frgossen on Dec 11 2020, 8:42 AM.

Details

Reviewers
herhut
akuegel
Commits
rG1c6bc2c0b5af: [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics

Diff Detail

Event Timeline

frgossen created this revision.Dec 11 2020, 8:42 AM
Herald added subscribers: teijeong, rdzhabarov, tatianashp and 15 others. · View Herald TranscriptDec 11 2020, 8:42 AM
frgossen requested review of this revision.Dec 11 2020, 8:42 AM
Herald added a reviewer: herhut. · View Herald TranscriptDec 11 2020, 8:42 AM
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: stephenneuendorffer, nicolasvasilache. · View Herald Transcript
frgossen added a reviewer: akuegel.Dec 11 2020, 8:43 AM
Harbormaster completed remote builds in B82059: Diff 311238.Dec 11 2020, 8:59 AM
frgossen updated this revision to Diff 311242.Dec 11 2020, 9:00 AM

Add tests

Harbormaster completed remote builds in B82061: Diff 311242.Dec 11 2020, 9:18 AM
akuegel accepted this revision.Dec 13 2020, 11:44 PM

Thanks :)

This revision is now accepted and ready to land.Dec 13 2020, 11:44 PM
This revision was landed with ongoing or failed builds.Dec 14 2020, 1:43 AM
Closed by commit rG1c6bc2c0b5af: [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics (authored by frgossen). · Explain Why
This revision was automatically updated to reflect the committed changes.
frgossen added a commit: rG1c6bc2c0b5af: [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics.

Revision Contents

PathSize
mlir/
lib/
Conversion/
GPUToROCDL/
4 lines
test/
Conversion/
GPUToROCDL/
30 lines

Diff 311524

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

Show First 20 Lines • Show All 99 Lines • ▼ Show 20 Lines patterns.insert<
ROCDL::BlockDimYOp, ROCDL::BlockDimZOp>, ROCDL::BlockDimYOp, ROCDL::BlockDimZOp>,
GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, ROCDL::BlockIdXOp, GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, ROCDL::BlockIdXOp,
ROCDL::BlockIdYOp, ROCDL::BlockIdZOp>, ROCDL::BlockIdYOp, ROCDL::BlockIdZOp>,
GPUIndexIntrinsicOpLowering<gpu::GridDimOp, ROCDL::GridDimXOp, GPUIndexIntrinsicOpLowering<gpu::GridDimOp, ROCDL::GridDimXOp,
ROCDL::GridDimYOp, ROCDL::GridDimZOp>, ROCDL::GridDimYOp, ROCDL::GridDimZOp>,
GPUFuncOpLowering<5>, GPUReturnOpLowering>(converter); GPUFuncOpLowering<5>, GPUReturnOpLowering>(converter);
patterns.insert<OpToFuncCallLowering<AbsFOp>>(converter, "__ocml_fabs_f32", patterns.insert<OpToFuncCallLowering<AbsFOp>>(converter, "__ocml_fabs_f32",
"__ocml_fabs_f64"); "__ocml_fabs_f64");
patterns.insert<OpToFuncCallLowering<AtanOp>>(converter, "__ocml_atan_f32",
"__ocml_atan_f64");
patterns.insert<OpToFuncCallLowering<Atan2Op>>(converter, "__ocml_atan2_f32",
"__ocml_atan2_f64");
patterns.insert<OpToFuncCallLowering<CeilFOp>>(converter, "__ocml_ceil_f32", patterns.insert<OpToFuncCallLowering<CeilFOp>>(converter, "__ocml_ceil_f32",
"__ocml_ceil_f64"); "__ocml_ceil_f64");
patterns.insert<OpToFuncCallLowering<CosOp>>(converter, "__ocml_cos_f32", patterns.insert<OpToFuncCallLowering<CosOp>>(converter, "__ocml_cos_f32",
"__ocml_cos_f64"); "__ocml_cos_f64");
patterns.insert<OpToFuncCallLowering<ExpOp>>(converter, "__ocml_exp_f32", patterns.insert<OpToFuncCallLowering<ExpOp>>(converter, "__ocml_exp_f32",
"__ocml_exp_f64"); "__ocml_exp_f64");
patterns.insert<OpToFuncCallLowering<FloorFOp>>(converter, "__ocml_floor_f32", patterns.insert<OpToFuncCallLowering<FloorFOp>>(converter, "__ocml_floor_f32",
"__ocml_floor_f64"); "__ocml_floor_f64");
Show All 20 Lines

mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

Show First 20 Lines • Show All 274 Lines • ▼ Show 20 Linesgpu.module @test_module {
func @gpu_tanh(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) { func @gpu_tanh(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
%result32 = std.tanh %arg_f32 : f32 %result32 = std.tanh %arg_f32 : f32
// CHECK: llvm.call @__ocml_tanh_f32(%{{.*}}) : (!llvm.float) -> !llvm.float // CHECK: llvm.call @__ocml_tanh_f32(%{{.*}}) : (!llvm.float) -> !llvm.float
%result64 = std.tanh %arg_f64 : f64 %result64 = std.tanh %arg_f64 : f64
// CHECK: llvm.call @__ocml_tanh_f64(%{{.*}}) : (!llvm.double) -> !llvm.double // CHECK: llvm.call @__ocml_tanh_f64(%{{.*}}) : (!llvm.double) -> !llvm.double
std.return %result32, %result64 : f32, f64 std.return %result32, %result64 : f32, f64
} }
} }
// -----
gpu.module @test_module {
// CHECK: llvm.func @__ocml_atan_f32(!llvm.float) -> !llvm.float
// CHECK: llvm.func @__ocml_atan_f64(!llvm.double) -> !llvm.double
// CHECK-LABEL: func @gpu_atan
func @gpu_atan(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
%result32 = std.atan %arg_f32 : f32
// CHECK: llvm.call @__ocml_atan_f32(%{{.*}}) : (!llvm.float) -> !llvm.float
%result64 = std.atan %arg_f64 : f64
// CHECK: llvm.call @__ocml_atan_f64(%{{.*}}) : (!llvm.double) -> !llvm.double
std.return %result32, %result64 : f32, f64
}
}
// -----
gpu.module @test_module {
// CHECK: llvm.func @__ocml_atan2_f32(!llvm.float, !llvm.float) -> !llvm.float
// CHECK: llvm.func @__ocml_atan2_f64(!llvm.double, !llvm.double) -> !llvm.double
// CHECK-LABEL: func @gpu_atan2
func @gpu_atan2(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
%result32 = std.atan2 %arg_f32, %arg_f32 : f32
// CHECK: llvm.call @__ocml_atan2_f32(%{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float
%result64 = std.atan2 %arg_f64, %arg_f64 : f64
// CHECK: llvm.call @__ocml_atan2_f64(%{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double
std.return %result32, %result64 : f32, f64
}
}