AArch64: Add initial apple-m1 target.

[pcc]

Summary

This set of features is based on the following system register values
which are advertised to hypervisor guests:

ID_AA64DFR0_EL1: 0x0000000010305006
ID_AA64DFR1_EL1: 0x0000000000000000
ID_AA64ISAR0_EL1: 0x0221100110212120
ID_AA64ISAR1_EL1: 0x0000011110211202
ID_AA64MMFR0_EL1: 0x000010000f100001
ID_AA64MMFR1_EL1: 0x0000000011212000
ID_AA64MMFR2_EL1: 0x1001001100001011
ID_AA64PFR0_EL1: 0x1101000010111111
ID_AA64PFR1_EL1: 0x0000000000000020

Although the set of features almost satisfies ARMv8.3, it is missing
FeatureVH (which may just be because the hypervisor is hiding the
feature from guests) and FeatureCCIDX (which we have listed as a
mandatory feature but is listed as optional in the ARM ARM), so
I decided to base the feature list on ARMv8.0 for now. We're also
missing FeatureTRACEV8_4, FeatureAM, FeatureSEL2, FeaturePMU from
ARMv8.4 but these may again be hidden from guests.

llvm/include/llvm/Support/AArch64TargetParser.def

 AARCH64_CPU_NAME("apple-a10", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_CRC | AArch64::AEK_RDM))
 AARCH64_CPU_NAME("apple-a11", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_NONE))
 AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_FP16))
 AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
+AARCH64_CPU_NAME("apple-m1", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+                 (AArch64::AEK_CRC | AArch64::AEK_FP16 | AArch64::AEK_RAS |
+                  AArch64::AEK_LSE | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
+                  AArch64::AEK_RDM | AArch64::AEK_SHA2 | AArch64::AEK_SHA3 |
+                  AArch64::AEK_AES | AArch64::AEK_FP16FML | AArch64::AEK_SSBS |
+                  AArch64::AEK_SB | AArch64::AEK_PREDRES))
 AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_FP16))
 AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_FP16))
 AARCH64_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_CRC))
 AARCH64_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
                  (AArch64::AEK_DOTPROD | AArch64::AEK_FP16))

llvm/lib/Target/AArch64/AArch64.td

def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13",
                                      FeatureZCRegMove,
                                      FeatureZCZeroing,
                                      FeatureFullFP16,
                                      FeatureFP16FML,
                                      FeatureSHA3,
                                      HasV8_4aOps
                                      ]>;
 
+def ProcAppleM1 : SubtargetFeature<"apple-m1", "ARMProcFamily", "Others",
+                                   "Apple M1", [
+                                   FeatureAES,
+                                   FeatureAltFPCmp,
+                                   FeatureCacheDeepPersist,
+                                   FeatureCCPP,
+                                   FeatureComplxNum,
+                                   FeatureCRC,
+                                   FeatureDIT,
+                                   FeatureDotProd,
+                                   FeatureFMI,
+                                   FeatureFP16FML,
+                                   FeatureFRInt3264,
+                                   FeatureJS,
+                                   FeatureLOR,
+                                   FeatureLSE,
+                                   FeaturePA,
+                                   FeaturePAN,
+                                   FeaturePAN_RWV,
+                                   FeaturePredRes,
+                                   FeaturePsUAO,
+                                   FeatureRAS,
+                                   FeatureRCPC,
+                                   FeatureRDM,
+                                   FeatureSB,
+                                   FeatureSHA2,
+                                   FeatureSHA3,
+                                   FeatureSSBS,
+                                   FeatureTLB_RMI,
+                                   ]>;
+
 def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3",
                                     "Samsung Exynos-M3 processors",
                                     [FeatureCRC,
                                      FeatureCrypto,
                                      FeatureExynosCheapAsMoveHandling,
                                      FeatureForce32BitJumpTables,
                                      FeatureFuseAddress,
                                      FeatureFuseAES,

 def : ProcessorModel<"apple-a7", CycloneModel, [ProcAppleA7]>;
 def : ProcessorModel<"apple-a8", CycloneModel, [ProcAppleA7]>;
 def : ProcessorModel<"apple-a9", CycloneModel, [ProcAppleA7]>;
 def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>;
 def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>;
 def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>;
 def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>;
 
+// Mac CPUs
+def : ProcessorModel<"apple-m1", CycloneModel, [ProcAppleM1]>;
+
 // watch CPUs.
 def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>;
 def : ProcessorModel<"apple-s5", CycloneModel, [ProcAppleA12]>;
 
 // Alias for the latest Apple processor model supported by LLVM.
 def : ProcessorModel<"apple-latest", CycloneModel, [ProcAppleA13]>;
 
 // Fujitsu A64FX

llvm/unittests/Support/TargetParserTest.cpp

TEST(TargetParserTest, testAArch64CPU) {
   EXPECT_TRUE(testAArch64CPU(
       "apple-a13", "armv8.4-a", "crypto-neon-fp-armv8",
       AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
           AArch64::AEK_SIMD | AArch64::AEK_LSE | AArch64::AEK_RAS |
           AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
           AArch64::AEK_FP16 | AArch64::AEK_FP16FML,
       "8.4-A"));
   EXPECT_TRUE(testAArch64CPU(
+      "apple-m1", "armv8-a", "crypto-neon-fp-armv8",
+      AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
+          AArch64::AEK_SIMD | AArch64::AEK_FP16 | AArch64::AEK_RAS |
+          AArch64::AEK_LSE | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
+          AArch64::AEK_RDM | AArch64::AEK_SHA2 | AArch64::AEK_SHA3 |
+          AArch64::AEK_AES | AArch64::AEK_FP16FML | AArch64::AEK_SSBS |
+          AArch64::AEK_SB | AArch64::AEK_PREDRES,
+      "8-A"));
+
+  EXPECT_TRUE(testAArch64CPU(
       "apple-s4", "armv8.3-a", "crypto-neon-fp-armv8",
       AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
           AArch64::AEK_SIMD | AArch64::AEK_LSE | AArch64::AEK_RAS |
           AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_FP16,
       "8.3-A"));
   EXPECT_TRUE(testAArch64CPU(
       "apple-s5", "armv8.3-a", "crypto-neon-fp-armv8",
       AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
TEST(TargetParserTest, testAArch64CPU) {
   EXPECT_TRUE(testAArch64CPU(
       "carmel", "armv8.2-a", "crypto-neon-fp-armv8",
       AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
       AArch64::AEK_SIMD | AArch64::AEK_FP16 | AArch64::AEK_RAS |
       AArch64::AEK_LSE | AArch64::AEK_RDM,
       "8.2-A"));
 }
 
-static constexpr unsigned NumAArch64CPUArchs = 45;
+static constexpr unsigned NumAArch64CPUArchs = 46;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector<StringRef, NumAArch64CPUArchs> List;
   AArch64::fillValidCPUArchList(List);
 
   // No list exists for these in this test suite, so ensure all are
   // valid, and match the expected 'magic' count.
   EXPECT_EQ(List.size(), NumAArch64CPUArchs);