[InstSimplify] Clarify use of FixedVectorType in SimplifySelectInst

[c-rhodes]

Summary

Folding a select of vector constants that include undef elements only
applies to fixed vectors, but there's no earlier check the type is not
scalable so it crashes for scalable vectors. This adds a check so this
optimization is only attempted for fixed vectors.

[sdesmalen]

Seems like a good change to me, thanks!

llvm/lib/Analysis/InstructionSimplify.cpp

if (Q.isUndefValue(TrueVal) &&
     return FalseVal;
   // select ?, X, undef -> X
   if (Q.isUndefValue(FalseVal) &&
       isGuaranteedNotToBeUndefOrPoison(TrueVal, Q.AC, Q.CxtI, Q.DT))
     return TrueVal;
 
   // Deal with partial undef vector constants: select ?, VecC, VecC' --> VecC''
   Constant *TrueC, *FalseC;
-  if (TrueVal->getType()->isVectorTy() && match(TrueVal, m_Constant(TrueC)) &&
+  if (isa<FixedVectorType>(TrueVal->getType()) &&
+      match(TrueVal, m_Constant(TrueC)) &&
       match(FalseVal, m_Constant(FalseC))) {
     unsigned NumElts =
         cast<FixedVectorType>(TrueC->getType())->getNumElements();
     SmallVector<Constant *, 16> NewC;
     for (unsigned i = 0; i != NumElts; ++i) {
       // Bail out on incomplete vector constants.
       Constant *TEltC = TrueC->getAggregateElement(i);
       Constant *FEltC = FalseC->getAggregateElement(i);

llvm/test/Transforms/InstSimplify/select.ll

 ;
   %cmp = icmp eq i32 %arg, 0
   %trailing = call i32 @llvm.cttz.i32(i32 %arg, i1 immarg true)
   %shifted = lshr i32 %arg, %trailing
   %r1.sroa.0.1 = select i1 %cmp, i32 0, i32 %shifted
   ret i32 %r1.sroa.0.1
 }
 declare i32 @llvm.cttz.i32(i32, i1 immarg)
+
+; Partial undef scalable vectors should be ignored.
+define <vscale x 2 x i1> @ignore_scalable_undef(<vscale x 2 x i1> %cond) {
+; CHECK-LABEL: @ignore_scalable_undef(
+; CHECK-NEXT:    [[S:%.*]] = select <vscale x 2 x i1> [[COND:%.*]], <vscale x 2 x i1> undef, <vscale x 2 x i1> insertelement (<vscale x 2 x i1> undef, i1 true, i32 0)
+; CHECK-NEXT:    ret <vscale x 2 x i1> [[S]]
+;
+  %vec = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
+  %s = select <vscale x 2 x i1> %cond, <vscale x 2 x i1> undef, <vscale x 2 x i1> %vec
+  ret <vscale x 2 x i1> %s
+}