[AArch64] Enable post RA scheduler for Cortex-R82

[SjoerdMeijer]

Summary

Something I forgot when I added the Cortex-R82.

[dmgreen]

Can you add a test line to the fuse-aes test? The postra feature is harder to test very well.

[SjoerdMeijer]

Thanks Dave, I got so excited about not having to test post RA scheduling I forgot about aes ;-)

[dmgreen]

llvm/lib/Target/AArch64/AArch64.td

674

If you are adding crypto (which doesn't sound like a bad idea to me), should there be some other tests for that?

If you want to keep this simple and do that in a separate patch, you could just add -mattr=+crypto to the r82 run line.

[SjoerdMeijer]

llvm/lib/Target/AArch64/AArch64.td

674

I discovered I need crypto otherwise we get "can't match aes intrinsics" for the fuse aes tests.
I was in two minds what to do here: strip out the fuse aes business here and do that separately, or see what you thought about doing it here. :-).
I like keeping things simple.... not sure if adding -mattr=crypto will really improve things for now as I need to follow up to properly fix it. I.e., I probably need to check more, also clang crypto option passing for the r82 and more tests etc., so let's keep it simple and just do that separately then.

[SjoerdMeijer]

Removed FusedAES and Crypto or now.

[dmgreen]

OK fine, sure. Lets just do this bit first. LGTM

llvm/lib/Target/AArch64/AArch64.td

def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily",
                                FeatureSPE,
                                FeatureFullFP16,
                                FeatureSSBS,
                                FeatureDotProd]>;
 
 def ProcR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
                                "CortexR82",
                                "Cortex-R82 ARM Processors", [
-                               // All features are implied by v8_0r ops:
+                               FeaturePostRAScheduler,
+                               FeatureFuseAES,
+                               // All other features are implied by v8_0r ops:
                                HasV8_0rOps,
                                ]>;
 
 def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
                                   "Cortex-X1 ARM processors", [
                                   HasV8_2aOps,
                                   FeatureCrypto,
                                   FeatureFPARMv8,