GlobalISel: Directly expose getDefSrcRegIgnoringCopies utility

[arsenm]

Summary

It's useful to get both the instruction and register at the same time.

[paquette]

LGTM with documentation nit

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

163

Can you document CopyOnly?

[arsenm]

c67e1a985f4d7a68b607a8bd0db74a4fc39d5596

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

163

This actually only exists in a future patch I haven't posted, so I've dropped the parameter

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

const ConstantFP* getConstantFPVRegVal(Register VReg,
                                        const MachineRegisterInfo &MRI);
 
 /// See if Reg is defined by an single def instruction that is
 /// Opcode. Also try to do trivial folding if it's a COPY with
 /// same types. Returns null otherwise.
 MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
                            const MachineRegisterInfo &MRI);
 
+struct DefinitionAndSourceRegister {
+  MachineInstr *MI;
+  Register Reg;
+};
+
+/// Find the def instruction for \p Reg, and underlying value Register folding
+/// away any copies.
+Optional<DefinitionAndSourceRegister>
+getDefSrcRegIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI,
+                           bool CopyOnly = true);
+
 /// Find the def instruction for \p Reg, folding away any trivial copies. May
 /// return nullptr if \p Reg is not a generic virtual register.
 MachineInstr *getDefIgnoringCopies(Register Reg,
                                    const MachineRegisterInfo &MRI);
 
 /// Find the def instruction for \p Reg, folding away any trivial copy-like
 /// operations.
 MachineInstr *getDefIgnoringCopyLike(Register Reg,

llvm/lib/CodeGen/GlobalISel/Utils.cpp

 const ConstantFP *
 llvm::getConstantFPVRegVal(Register VReg, const MachineRegisterInfo &MRI) {
   MachineInstr *MI = MRI.getVRegDef(VReg);
   if (TargetOpcode::G_FCONSTANT != MI->getOpcode())
     return nullptr;
   return MI->getOperand(1).getFPImm();
 }
 
-namespace {
-struct DefinitionAndSourceRegister {
-  MachineInstr *MI;
-  Register Reg;
-};
-} // namespace
-
 /// Return the source virtual register if this is a bit-preserving no-op cast,
 /// otherwise Register().
 static Register getCopyLikeSrcReg(const MachineInstr &MI,
                                   const MachineRegisterInfo &MRI,
                                   bool CopyOnly) {
   if (MI.getOpcode() == TargetOpcode::COPY) {
     Register SrcReg = MI.getOperand(1).getReg();
     LLT SrcTy = MRI.getType(SrcReg);
case TargetOpcode::G_INTTOPTR: {
     LLT SrcTy = MRI.getType(SrcReg);
     return SrcTy.getSizeInBits() == DstTy.getSizeInBits() ? SrcReg : Register();
   }
   default:
     return Register();
   }
 }
 
-static Optional<DefinitionAndSourceRegister>
-getDefSrcRegIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI,
+Optional<DefinitionAndSourceRegister>
+llvm::getDefSrcRegIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI,
                                  bool CopyOnly) {
   Register DefSrcReg = Reg;
   auto *DefMI = MRI.getVRegDef(Reg);
   auto DstTy = MRI.getType(DefMI->getOperand(0).getReg());
   if (!DstTy.isValid())
     return None;
 
   while (Register SrcReg = getCopyLikeSrcReg(*DefMI, MRI, CopyOnly)) {
     DefMI = MRI.getVRegDef(SrcReg);