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[amdgpu] Enhance disjoint memory accesses checking.
AbandonedPublic

Authored by hliao on Oct 21 2020, 11:16 AM.

Details

Reviewers
arsenm
rampitec
Summary
  • Follow the same logic as the enhancement in AMDGPU AA.

Diff Detail

Unit TestsFailed

TimeTest
380 mslinux > HWAddressSanitizer-x86_64.TestCases::sizes.cpp
Script: -- : 'RUN: at line 3'; /mnt/disks/ssd0/agent/llvm-project/build/./bin/clang --driver-mode=g++ -m64 -gline-tables-only -fsanitize=hwaddress -fuse-ld=lld -mcmodel=large -mllvm -hwasan-globals -mllvm -hwasan-use-short-granules -mllvm -hwasan-instrument-landing-pads=0 -mllvm -hwasan-instrument-personality-functions /mnt/disks/ssd0/agent/llvm-project/compiler-rt/test/hwasan/TestCases/sizes.cpp -nostdlib++ -lstdc++ -o /mnt/disks/ssd0/agent/llvm-project/build/projects/compiler-rt/test/hwasan/X86_64/TestCases/Output/sizes.cpp.tmp

Event Timeline

hliao created this revision.Oct 21 2020, 11:16 AM
hliao requested review of this revision.Oct 21 2020, 11:16 AM
arsenm added inline comments.Oct 21 2020, 11:29 AM
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
2844

I think this is too much heavy lifting for areMemAccessesTriviallyDisjoint. The whole point of it is to check based on the instruction itself without relying on the IR/AA

hliao abandoned this revision.Tue, Nov 10, 7:10 AM

with multiple MMO is supported in the scheduler, this patch is no longer for performance.