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Differential D88876

[AMDGPU] Fix gcc warnings
ClosedPublic

Authored by Flakebi on Oct 6 2020, 1:48 AM.

Details

Reviewers
uabelho
Commits
rG9fc535f987b4: [AMDGPU] Fix gcc warnings
Summary

uint8_t types are implicitly promoted to int, leading to a
unsigned-signed comparison.

Thanks for the heads-up @uabelho.

Diff Detail

Event Timeline

Flakebi created this revision.Oct 6 2020, 1:48 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 6 2020, 1:48 AM
Herald added subscribers: llvm-commits, kerbowa, hiraditya and 8 others. · View Herald Transcript
Flakebi requested review of this revision.Oct 6 2020, 1:48 AM
Herald added a subscriber: wdng. · View Herald TranscriptOct 6 2020, 1:48 AM
uabelho accepted this revision.Oct 6 2020, 1:54 AM

Thanks!

This revision is now accepted and ready to land.Oct 6 2020, 1:54 AM
This revision was landed with ongoing or failed builds.Oct 6 2020, 2:01 AM
Closed by commit rG9fc535f987b4: [AMDGPU] Fix gcc warnings (authored by sebastian-ne). · Explain Why
This revision was automatically updated to reflect the committed changes.
sebastian-ne added a commit: rG9fc535f987b4: [AMDGPU] Fix gcc warnings.
Harbormaster completed remote builds in B74102: Diff 296379.Oct 6 2020, 2:01 AM

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
6 lines

Diff 296379

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Show First 20 Lines • Show All 3,936 Lines • ▼ Show 20 Lines for (unsigned I = Intr->VAddrStart; I < EndIdx; I++) {
if (I < Intr->GradientStart) { if (I < Intr->GradientStart) {
AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0);
PackedAddrs.push_back(AddrReg); PackedAddrs.push_back(AddrReg);
} else { } else {
// Dz/dh, dz/dv and the last odd coord are packed with undef. Also, in 1D, // Dz/dh, dz/dv and the last odd coord are packed with undef. Also, in 1D,
// derivatives dx/dh and dx/dv are packed with undef. // derivatives dx/dh and dx/dv are packed with undef.
if (((I + 1) >= EndIdx) || if (((I + 1) >= EndIdx) ||
((Intr->NumGradients / 2) % 2 == 1 && ((Intr->NumGradients / 2) % 2 == 1 &&
(I == Intr->GradientStart + (Intr->NumGradients / 2) - 1 || (I == static_cast<unsigned>(Intr->GradientStart +
I == Intr->GradientStart + Intr->NumGradients - 1)) || (Intr->NumGradients / 2) - 1) ||
I == static_cast<unsigned>(Intr->GradientStart +
Intr->NumGradients - 1))) ||
// Check for _L to _LZ optimization // Check for _L to _LZ optimization
!MI.getOperand(ArgOffset + I + 1).isReg()) { !MI.getOperand(ArgOffset + I + 1).isReg()) {
PackedAddrs.push_back( PackedAddrs.push_back(
B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)})
.getReg(0)); .getReg(0));
} else { } else {
PackedAddrs.push_back( PackedAddrs.push_back(
B.buildBuildVector( B.buildBuildVector(
▲ Show 20 Lines • Show All 822 Lines • Show Last 20 Lines