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Differential D86464

GlobalISel: Lift store value widening restriction
ClosedPublic

Authored by arsenm on Aug 24 2020, 8:17 AM.

Details

Reviewers
aemerson
paquette
dsanders
aditya_nandakumar
Summary

This doesn't change the memory size and doesn't need to worry about
non-power-of-2 sizes.

Diff Detail

Event Timeline

arsenm created this revision.Aug 24 2020, 8:17 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 24 2020, 8:17 AM
Herald added subscribers: kerbowa, hiraditya, rovka and 2 others. · View Herald Transcript
arsenm requested review of this revision.Aug 24 2020, 8:17 AM
Herald added a subscriber: wdng. · View Herald TranscriptAug 24 2020, 8:17 AM
paquette added inline comments.Aug 27 2020, 11:00 AM
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
459

Why are there commented-out tests here?

arsenm added inline comments.Aug 27 2020, 11:04 AM
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
459

These assert for other reasons that need to be fixed

arsenm added a comment.Sep 16 2020, 10:27 AM

ping

aemerson accepted this revision.Sep 16 2020, 10:43 AM
This revision is now accepted and ready to land.Sep 16 2020, 10:43 AM
arsenm closed this revision.Sep 16 2020, 11:25 AM

88bdcbbf1aaef6ac99877cc511bf4b2a85343773

Revision Contents

PathSize
llvm/
lib/
CodeGen/
GlobalISel/
2 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
288 lines

Diff 287404

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Show First 20 Lines • Show All 2,024 Lines • ▼ Show 20 Lines case TargetOpcode::G_ZEXTLOAD:
Observer.changedInstr(MI); Observer.changedInstr(MI);
return Legalized; return Legalized;
case TargetOpcode::G_STORE: { case TargetOpcode::G_STORE: {
if (TypeIdx != 0) if (TypeIdx != 0)
return UnableToLegalize; return UnableToLegalize;
LLT Ty = MRI.getType(MI.getOperand(0).getReg()); LLT Ty = MRI.getType(MI.getOperand(0).getReg());
if (!isPowerOf2_32(Ty.getSizeInBits())) if (!Ty.isScalar())
return UnableToLegalize; return UnableToLegalize;
Observer.changingInstr(MI); Observer.changingInstr(MI);
unsigned ExtType = Ty.getScalarSizeInBits() == 1 ? unsigned ExtType = Ty.getScalarSizeInBits() == 1 ?
TargetOpcode::G_ZEXT : TargetOpcode::G_ANYEXT; TargetOpcode::G_ZEXT : TargetOpcode::G_ANYEXT;
widenScalarSrc(MI, WideTy, 0, ExtType); widenScalarSrc(MI, WideTy, 0, ExtType);
▲ Show 20 Lines • Show All 4,092 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show All 39 Lines bb.0:
; GFX9: G_STORE [[AND]](s32), [[COPY]](p1) :: (store 1, addrspace 1) ; GFX9: G_STORE [[AND]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1 %0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2 %1:_(s32) = COPY $vgpr2
%2:_(s1) = G_TRUNC %1 %2:_(s1) = G_TRUNC %1
G_STORE %2, %0 :: (store 1, align 1, addrspace 1) G_STORE %2, %0 :: (store 1, align 1, addrspace 1)
... ...
--- ---
name: test_store_global_s7_align1
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s7_align1
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
; CI-LABEL: name: test_store_global_s7_align1
; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; CI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
; VI-LABEL: name: test_store_global_s7_align1
; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
; GFX9-LABEL: name: test_store_global_s7_align1
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s7) = G_TRUNC %1
G_STORE %2, %0 :: (store 1, align 1, addrspace 1)
...
---
name: test_store_global_s8_align1 name: test_store_global_s8_align1
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s8_align1 ; SI-LABEL: name: test_store_global_s8_align1
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
▲ Show 20 Lines • Show All 132 Lines • ▼ Show 20 Lines bb.0:
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1) ; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1 %0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2 %1:_(s32) = COPY $vgpr2
%2:_(s16) = G_TRUNC %1 %2:_(s16) = G_TRUNC %1
G_STORE %2, %0 :: (store 2, align 4, addrspace 1) G_STORE %2, %0 :: (store 2, align 4, addrspace 1)
... ...
--- ---
name: test_store_global_s24_align4
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s24_align4
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; SI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1)
; SI: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; CI-LABEL: name: test_store_global_s24_align4
; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; CI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1)
; CI: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; VI-LABEL: name: test_store_global_s24_align4
; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; VI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1)
; VI: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; GFX9-LABEL: name: test_store_global_s24_align4
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; GFX9: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 4, addrspace 1)
; GFX9: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s24) = G_TRUNC %1
G_STORE %2, %0 :: (store 3, align 4, addrspace 1)
...
---
name: test_store_global_s24_align2
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s24_align2
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; SI: G_STORE [[COPY5]](s32), [[COPY]](p1) :: (store 2, addrspace 1)
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; SI: G_STORE [[COPY6]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; CI-LABEL: name: test_store_global_s24_align2
; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; CI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, addrspace 1)
; CI: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; VI-LABEL: name: test_store_global_s24_align2
; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; VI: G_STORE [[COPY5]](s32), [[COPY]](p1) :: (store 2, addrspace 1)
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; VI: G_STORE [[COPY6]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
; GFX9-LABEL: name: test_store_global_s24_align2
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; GFX9: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, addrspace 1)
; GFX9: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, align 2, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s24) = G_TRUNC %1
G_STORE %2, %0 :: (store 3, align 2, addrspace 1)
...
---
name: test_store_global_s24_align1
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s24_align1
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]]
; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[C2]](s32)
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; SI: G_STORE [[COPY6]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64)
; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; SI: G_STORE [[COPY7]](s32), [[PTR_ADD]](p1) :: (store 1 + 1, addrspace 1)
; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64)
; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; SI: G_STORE [[COPY8]](s32), [[PTR_ADD1]](p1) :: (store 1 + 2, addrspace 1)
; CI-LABEL: name: test_store_global_s24_align1
; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; CI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 1, addrspace 1)
; CI: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, addrspace 1)
; VI-LABEL: name: test_store_global_s24_align1
; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
; VI: [[LSHR1:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC]], [[C2]](s16)
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; VI: G_STORE [[COPY5]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64)
; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LSHR1]](s16)
; VI: G_STORE [[ANYEXT]](s32), [[PTR_ADD]](p1) :: (store 1 + 1, addrspace 1)
; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; VI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64)
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; VI: G_STORE [[COPY6]](s32), [[PTR_ADD1]](p1) :: (store 1 + 2, addrspace 1)
; GFX9-LABEL: name: test_store_global_s24_align1
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; GFX9: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 2, align 1, addrspace 1)
; GFX9: G_STORE [[LSHR]](s32), [[PTR_ADD]](p1) :: (store 1 + 2, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s24) = G_TRUNC %1
G_STORE %2, %0 :: (store 3, align 1, addrspace 1)
...
---
name: test_store_global_s25_align4
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s25_align4
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 4, addrspace 1)
; CI-LABEL: name: test_store_global_s25_align4
; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; CI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 4, addrspace 1)
; VI-LABEL: name: test_store_global_s25_align4
; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 4, addrspace 1)
; GFX9-LABEL: name: test_store_global_s25_align4
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: G_STORE [[COPY2]](s32), [[COPY]](p1) :: (store 4, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s25) = G_TRUNC %1
G_STORE %2, %0 :: (store 4, align 4, addrspace 1)
...
# ---
paquetteUnsubmitted
Not Done
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Why are there commented-out tests here?

paquette: Why are there commented-out tests here?
arsenmAuthorUnsubmitted
Done
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These assert for other reasons that need to be fixed

arsenm: These assert for other reasons that need to be fixed
# name: test_store_global_s25_align2
# body: |
# bb.0:
# liveins: $vgpr0_vgpr1, $vgpr2
# %0:_(p1) = COPY $vgpr0_vgpr1
# %1:_(s32) = COPY $vgpr2
# %2:_(s25) = G_TRUNC %1
# G_STORE %2, %0 :: (store 4, align 2, addrspace 1)
# ...
# ---
# name: test_store_global_s25_align1
# body: |
# bb.0:
# liveins: $vgpr0_vgpr1, $vgpr2
# %0:_(p1) = COPY $vgpr0_vgpr1
# %1:_(s32) = COPY $vgpr2
# %2:_(s25) = G_TRUNC %1
# G_STORE %2, %0 :: (store 4, align 1, addrspace 1)
# ...
---
name: test_store_global_s32_align1 name: test_store_global_s32_align1
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_store_global_s32_align1 ; SI-LABEL: name: test_store_global_s32_align1
; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
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