[X86][FastISel] Support materializing floating-point constants for large code model & PIC

[MaskRay]

Summary

The following program will compile incorrectly because rL216012 added
static relocation model support but not for PIC.

// clang -fpic -mcmodel=large a.cc
double foo() { return 42.0; }

This patch adds PIC support.

[MaskRay]

Simplify (PICBase may be 0 -> degenerates to addDirectMem)

[MaskRay]

🤡

[craig.topper]

LGTM

llvm/lib/Target/X86/X86FastISel.cpp

unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
   // Large code model only applies to 64-bit mode.
   if (Subtarget->is64Bit() && CM == CodeModel::Large) {
     Register AddrReg = createResultReg(&X86::GR64RegClass);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(X86::MOV64ri),
             AddrReg)
       .addConstantPoolIndex(CPI, 0, OpFlag);
     MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                                       TII.get(Opc), ResultReg);
-    addDirectMem(MIB, AddrReg);
+    addRegReg(MIB, AddrReg, false, PICBase, false);
     MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
         MachinePointerInfo::getConstantPool(*FuncInfo.MF),
         MachineMemOperand::MOLoad, DL.getPointerSize(), Alignment);
     MIB->addMemOperand(*FuncInfo.MF, MMO);
     return ResultReg;
   }
 
   addConstantPoolReference(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,

llvm/test/CodeGen/X86/fast-isel-constpool.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
+; RUN: llc -mtriple=x86_64 -fast-isel -code-model=large -relocation-model=pic < %s | FileCheck %s --check-prefix=LARGE_PIC
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx < %s | FileCheck %s --check-prefix=AVX
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx < %s | FileCheck %s --check-prefix=LARGE_AVX
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX
 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx512f < %s | FileCheck %s --check-prefix=LARGE_AVX
 
 ; This large code mode shouldn't mean anything on x86 but it used to
 ; generate 64-bit only instructions and asserted in the encoder.
 ; -show-mc-encoding here to assert if this breaks again.
 ; RUN: llc -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE
 
 ; Make sure fast isel uses rip-relative addressing for the small code model.
 define float @constpool_float(float %x) {
 ; CHECK-LABEL: constpool_float:
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
 ; CHECK-NEXT:    addss %xmm1, %xmm0
 ; CHECK-NEXT:    retq
 ;
 ; LARGE-LABEL: constpool_float:
 ; LARGE:       ## %bb.0:
 ; LARGE-NEXT:    movabsq $LCPI0_0, %rax
 ; LARGE-NEXT:    addss (%rax), %xmm0
 ; LARGE-NEXT:    retq
 ;
+; LARGE_PIC-LABEL: constpool_float:
+; LARGE_PIC:       # %bb.0:
+; LARGE_PIC-NEXT:  .L0$pb:
+; LARGE_PIC-NEXT:    leaq .L0$pb(%rip), %rax
+; LARGE_PIC-NEXT:    movabsq $_GLOBAL_OFFSET_TABLE_-.L0$pb, %rcx
+; LARGE_PIC-NEXT:    addq %rax, %rcx
+; LARGE_PIC-NEXT:    movabsq $.LCPI0_0@GOTOFF, %rax
+; LARGE_PIC-NEXT:    addss (%rax,%rcx), %xmm0
+; LARGE_PIC-NEXT:    retq
+;
 ; AVX-LABEL: constpool_float:
 ; AVX:       ## %bb.0:
 ; AVX-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
 ; AVX-NEXT:    vaddss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    retq
 ;
 ; LARGE_AVX-LABEL: constpool_float:
 ; LARGE_AVX:       ## %bb.0: