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Differential D84592

[X86] Add custom lowering for llvm.roundeven with sse4.1.
ClosedPublic

Authored by craig.topper on Jul 25 2020, 3:48 PM.

Details

Reviewers
spatel
RKSimon
sepavloff
Commits
rGc4823b24a41b: [X86] Add custom lowering for llvm.roundeven with sse4.1.
Summary

We can use the roundss/sd/ps/pd instructions like we do for
ceil/floor/trunc/rint/nearbyint.

Diff Detail

Unit TestsFailed

TimeTest
160 mslinux > Polly.ScopInfo::Unknown Unit Message ("")

Event Timeline

craig.topper created this revision.Jul 25 2020, 3:48 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 25 2020, 3:48 PM
Herald added a subscriber: hiraditya. · View Herald Transcript
Harbormaster failed remote builds in B65702: Diff 280701!Jul 25 2020, 4:18 PM
craig.topper added a reviewer: sepavloff.Jul 27 2020, 1:22 PM
sepavloff added inline comments.Jul 27 2020, 9:41 PM
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
1026

Should it be 0?
From ROUNDSS description:

Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
exception is not signaled.)
craig.topper added inline comments.Jul 27 2020, 10:34 PM
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
1026

Should it be 0?
From ROUNDSS description:

Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
exception is not signaled.)

I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact exception.

sepavloff accepted this revision.Jul 27 2020, 11:55 PM

LGTM.

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
1026

I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact exception.

Indeed, TS 18661-1 changed wording and now these functions are closer to their roundToIntegral* counterparts from IEEE-754.

This revision is now accepted and ready to land.Jul 27 2020, 11:55 PM
This revision was landed with ongoing or failed builds.Jul 29 2020, 10:23 AM
Closed by commit rGc4823b24a41b: [X86] Add custom lowering for llvm.roundeven with sse4.1. (authored by craig.topper). · Explain Why
This revision was automatically updated to reflect the committed changes.
craig.topper added a commit: rGc4823b24a41b: [X86] Add custom lowering for llvm.roundeven with sse4.1..

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
4 lines
6 lines
test/
CodeGen/
X86/
690 lines
64 lines

Diff 280701

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

//===- X86ISelDAGToDAG.cpp - A DAG pattern matching inst selector for X86 -===// //===- X86ISelDAGToDAG.cpp - A DAG pattern matching inst selector for X86 -===//
Lint: Lint
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clang-format not found in user's PATH; not linting file.

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// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
▲ Show 20 Lines • Show All 991 Lines • ▼ Show 20 Lines case ISD::ANY_EXTEND_VECTOR_INREG: {
continue; continue;
} }
case ISD::FCEIL: case ISD::FCEIL:
case ISD::STRICT_FCEIL: case ISD::STRICT_FCEIL:
case ISD::FFLOOR: case ISD::FFLOOR:
case ISD::STRICT_FFLOOR: case ISD::STRICT_FFLOOR:
case ISD::FTRUNC: case ISD::FTRUNC:
case ISD::STRICT_FTRUNC: case ISD::STRICT_FTRUNC:
case ISD::FROUNDEVEN:
case ISD::STRICT_FROUNDEVEN:
case ISD::FNEARBYINT: case ISD::FNEARBYINT:
case ISD::STRICT_FNEARBYINT: case ISD::STRICT_FNEARBYINT:
case ISD::FRINT: case ISD::FRINT:
case ISD::STRICT_FRINT: { case ISD::STRICT_FRINT: {
// Replace fp rounding with their X86 specific equivalent so we don't // Replace fp rounding with their X86 specific equivalent so we don't
// need 2 sets of patterns. // need 2 sets of patterns.
unsigned Imm; unsigned Imm;
switch (N->getOpcode()) { switch (N->getOpcode()) {
default: llvm_unreachable("Unexpected opcode!"); default: llvm_unreachable("Unexpected opcode!");
case ISD::STRICT_FCEIL: case ISD::STRICT_FCEIL:
case ISD::FCEIL: Imm = 0xA; break; case ISD::FCEIL: Imm = 0xA; break;
case ISD::STRICT_FFLOOR: case ISD::STRICT_FFLOOR:
case ISD::FFLOOR: Imm = 0x9; break; case ISD::FFLOOR: Imm = 0x9; break;
case ISD::STRICT_FTRUNC: case ISD::STRICT_FTRUNC:
case ISD::FTRUNC: Imm = 0xB; break; case ISD::FTRUNC: Imm = 0xB; break;
case ISD::STRICT_FROUNDEVEN:
case ISD::FROUNDEVEN: Imm = 0x8; break;
Lint: Pre-merge checks
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clang-format: please reformat the code

-      case ISD::FROUNDEVEN: Imm = 0x8; break;
+      case ISD::FROUNDEVEN:
+        Imm = 0x8;
+        break;
Lint: Pre-merge checks: clang-format: please reformat the code ``` - case ISD::FROUNDEVEN: Imm = 0x8; break; +…
sepavloffUnsubmitted
Not Done
ReplyInline Actions

Should it be 0?
From ROUNDSS description:

Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
exception is not signaled.)
sepavloff: Should it be 0? From ROUNDSS description: ``` Precision (signaled only if imm[3] = ‘0; if imm…
craig.topperAuthorUnsubmitted
Done
ReplyInline Actions

Should it be 0?
From ROUNDSS description:

Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
exception is not signaled.)

I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact exception.

craig.topper: > Should it be 0? > From ROUNDSS description: > ``` > Precision (signaled only if imm[3] = ‘0…
sepavloffUnsubmitted
Not Done
ReplyInline Actions

I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact exception.

Indeed, TS 18661-1 changed wording and now these functions are closer to their roundToIntegral* counterparts from IEEE-754.

sepavloff: > I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact…
case ISD::STRICT_FNEARBYINT: case ISD::STRICT_FNEARBYINT:
case ISD::FNEARBYINT: Imm = 0xC; break; case ISD::FNEARBYINT: Imm = 0xC; break;
case ISD::STRICT_FRINT: case ISD::STRICT_FRINT:
case ISD::FRINT: Imm = 0x4; break; case ISD::FRINT: Imm = 0x4; break;
} }
SDLoc dl(N); SDLoc dl(N);
bool IsStrict = N->isStrictFPOpcode(); bool IsStrict = N->isStrictFPOpcode();
SDValue Res; SDValue Res;
▲ Show 20 Lines • Show All 4,615 Lines • Show Last 20 Lines

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
//===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===// //===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===//
Lint: Lint
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clang-format not found in user's PATH; not linting file.

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// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
▲ Show 20 Lines • Show All 1,067 Lines • ▼ Show 20 Lines for (MVT RoundedTy : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) {
setOperationAction(ISD::FCEIL, RoundedTy, Legal); setOperationAction(ISD::FCEIL, RoundedTy, Legal);
setOperationAction(ISD::STRICT_FCEIL, RoundedTy, Legal); setOperationAction(ISD::STRICT_FCEIL, RoundedTy, Legal);
setOperationAction(ISD::FTRUNC, RoundedTy, Legal); setOperationAction(ISD::FTRUNC, RoundedTy, Legal);
setOperationAction(ISD::STRICT_FTRUNC, RoundedTy, Legal); setOperationAction(ISD::STRICT_FTRUNC, RoundedTy, Legal);
setOperationAction(ISD::FRINT, RoundedTy, Legal); setOperationAction(ISD::FRINT, RoundedTy, Legal);
setOperationAction(ISD::STRICT_FRINT, RoundedTy, Legal); setOperationAction(ISD::STRICT_FRINT, RoundedTy, Legal);
setOperationAction(ISD::FNEARBYINT, RoundedTy, Legal); setOperationAction(ISD::FNEARBYINT, RoundedTy, Legal);
setOperationAction(ISD::STRICT_FNEARBYINT, RoundedTy, Legal); setOperationAction(ISD::STRICT_FNEARBYINT, RoundedTy, Legal);
setOperationAction(ISD::FROUNDEVEN, RoundedTy, Legal);
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-      setOperationAction(ISD::FROUNDEVEN,        RoundedTy,  Legal);
-      setOperationAction(ISD::STRICT_FROUNDEVEN, RoundedTy,  Legal);
+      setOperationAction(ISD::FROUNDEVEN, RoundedTy, Legal);
+      setOperationAction(ISD::STRICT_FROUNDEVEN, RoundedTy, Legal);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - setOperationAction(ISD::FROUNDEVEN…
setOperationAction(ISD::STRICT_FROUNDEVEN, RoundedTy, Legal);
setOperationAction(ISD::FROUND, RoundedTy, Custom); setOperationAction(ISD::FROUND, RoundedTy, Custom);
} }
setOperationAction(ISD::SMAX, MVT::v16i8, Legal); setOperationAction(ISD::SMAX, MVT::v16i8, Legal);
setOperationAction(ISD::SMAX, MVT::v4i32, Legal); setOperationAction(ISD::SMAX, MVT::v4i32, Legal);
setOperationAction(ISD::UMAX, MVT::v8i16, Legal); setOperationAction(ISD::UMAX, MVT::v8i16, Legal);
setOperationAction(ISD::UMAX, MVT::v4i32, Legal); setOperationAction(ISD::UMAX, MVT::v4i32, Legal);
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines for (auto VT : { MVT::v8f32, MVT::v4f64 }) {
setOperationAction(ISD::FCEIL, VT, Legal); setOperationAction(ISD::FCEIL, VT, Legal);
setOperationAction(ISD::STRICT_FCEIL, VT, Legal); setOperationAction(ISD::STRICT_FCEIL, VT, Legal);
setOperationAction(ISD::FTRUNC, VT, Legal); setOperationAction(ISD::FTRUNC, VT, Legal);
setOperationAction(ISD::STRICT_FTRUNC, VT, Legal); setOperationAction(ISD::STRICT_FTRUNC, VT, Legal);
setOperationAction(ISD::FRINT, VT, Legal); setOperationAction(ISD::FRINT, VT, Legal);
setOperationAction(ISD::STRICT_FRINT, VT, Legal); setOperationAction(ISD::STRICT_FRINT, VT, Legal);
setOperationAction(ISD::FNEARBYINT, VT, Legal); setOperationAction(ISD::FNEARBYINT, VT, Legal);
setOperationAction(ISD::STRICT_FNEARBYINT, VT, Legal); setOperationAction(ISD::STRICT_FNEARBYINT, VT, Legal);
setOperationAction(ISD::FROUNDEVEN, VT, Legal);
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clang-format: please reformat the code

-      setOperationAction(ISD::FROUNDEVEN,        VT, Legal);
+      setOperationAction(ISD::FROUNDEVEN, VT, Legal);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - setOperationAction(ISD::FROUNDEVEN, VT…
setOperationAction(ISD::STRICT_FROUNDEVEN, VT, Legal);
setOperationAction(ISD::FROUND, VT, Custom); setOperationAction(ISD::FROUND, VT, Custom);
setOperationAction(ISD::FNEG, VT, Custom); setOperationAction(ISD::FNEG, VT, Custom);
setOperationAction(ISD::FABS, VT, Custom); setOperationAction(ISD::FABS, VT, Custom);
setOperationAction(ISD::FCOPYSIGN, VT, Custom); setOperationAction(ISD::FCOPYSIGN, VT, Custom);
} }
▲ Show 20 Lines • Show All 369 Lines • ▼ Show 20 Lines for (auto VT : { MVT::v16f32, MVT::v8f64 }) {
setOperationAction(ISD::FCEIL, VT, Legal); setOperationAction(ISD::FCEIL, VT, Legal);
setOperationAction(ISD::STRICT_FCEIL, VT, Legal); setOperationAction(ISD::STRICT_FCEIL, VT, Legal);
setOperationAction(ISD::FTRUNC, VT, Legal); setOperationAction(ISD::FTRUNC, VT, Legal);
setOperationAction(ISD::STRICT_FTRUNC, VT, Legal); setOperationAction(ISD::STRICT_FTRUNC, VT, Legal);
setOperationAction(ISD::FRINT, VT, Legal); setOperationAction(ISD::FRINT, VT, Legal);
setOperationAction(ISD::STRICT_FRINT, VT, Legal); setOperationAction(ISD::STRICT_FRINT, VT, Legal);
setOperationAction(ISD::FNEARBYINT, VT, Legal); setOperationAction(ISD::FNEARBYINT, VT, Legal);
setOperationAction(ISD::STRICT_FNEARBYINT, VT, Legal); setOperationAction(ISD::STRICT_FNEARBYINT, VT, Legal);
setOperationAction(ISD::FROUNDEVEN, VT, Legal);
Lint: Pre-merge checks
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clang-format: please reformat the code

-      setOperationAction(ISD::FROUNDEVEN,        VT, Legal);
+      setOperationAction(ISD::FROUNDEVEN, VT, Legal);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - setOperationAction(ISD::FROUNDEVEN, VT…
setOperationAction(ISD::STRICT_FROUNDEVEN, VT, Legal);
setOperationAction(ISD::FROUND, VT, Custom); setOperationAction(ISD::FROUND, VT, Custom);
} }
for (auto VT : {MVT::v32i16, MVT::v16i32, MVT::v8i64}) { for (auto VT : {MVT::v32i16, MVT::v16i32, MVT::v8i64}) {
setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Custom); setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Custom);
setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Custom); setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Custom);
} }
▲ Show 20 Lines • Show All 32,759 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/fp-roundeven.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
define float @roundeven_f32(float %x) { define float @roundeven_f32(float %x) {
; SSE2-LABEL: roundeven_f32: ; SSE2-LABEL: roundeven_f32:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
; SSE2-NEXT: jmp _roundevenf ## TAILCALL ; SSE2-NEXT: jmp _roundevenf ## TAILCALL
; ;
; SSE41-LABEL: roundeven_f32: ; SSE41-LABEL: roundeven_f32:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: jmp _roundevenf ## TAILCALL ; SSE41-NEXT: roundss $8, %xmm0, %xmm0
; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_f32: ; AVX-LABEL: roundeven_f32:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: jmp _roundevenf ## TAILCALL ; AVX-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = call float @llvm.roundeven.f32(float %x) %a = call float @llvm.roundeven.f32(float %x)
ret float %a ret float %a
} }
define double @roundeven_f64(double %x) { define double @roundeven_f64(double %x) {
; SSE2-LABEL: roundeven_f64: ; SSE2-LABEL: roundeven_f64:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
; SSE2-NEXT: jmp _roundeven ## TAILCALL ; SSE2-NEXT: jmp _roundeven ## TAILCALL
; ;
; SSE41-LABEL: roundeven_f64: ; SSE41-LABEL: roundeven_f64:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: jmp _roundeven ## TAILCALL ; SSE41-NEXT: roundsd $8, %xmm0, %xmm0
; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_f64: ; AVX-LABEL: roundeven_f64:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: jmp _roundeven ## TAILCALL ; AVX-NEXT: vroundsd $8, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = call double @llvm.roundeven.f64(double %x) %a = call double @llvm.roundeven.f64(double %x)
ret double %a ret double %a
} }
define <4 x float> @roundeven_v4f32(<4 x float> %x) { define <4 x float> @roundeven_v4f32(<4 x float> %x) {
; SSE2-LABEL: roundeven_v4f32: ; SSE2-LABEL: roundeven_v4f32:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
; SSE2-NEXT: subq $56, %rsp ; SSE2-NEXT: subq $56, %rsp
Show All 19 Lines
; SSE2-NEXT: unpcklpd (%rsp), %xmm1 ## 16-byte Folded Reload ; SSE2-NEXT: unpcklpd (%rsp), %xmm1 ## 16-byte Folded Reload
; SSE2-NEXT: ## xmm1 = xmm1[0],mem[0] ; SSE2-NEXT: ## xmm1 = xmm1[0],mem[0]
; SSE2-NEXT: movaps %xmm1, %xmm0 ; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: addq $56, %rsp ; SSE2-NEXT: addq $56, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v4f32: ; SSE41-LABEL: roundeven_v4f32:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $40, %rsp ; SSE41-NEXT: roundps $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 48
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps %xmm1, %xmm0
; SSE41-NEXT: addq $40, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_v4f32: ; AVX-LABEL: roundeven_v4f32:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: subq $40, %rsp ; AVX-NEXT: vroundps $8, %xmm0, %xmm0
; AVX-NEXT: .cfi_def_cfa_offset 48
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: retq ; AVX-NEXT: retq
%a = call <4 x float> @llvm.roundeven.v4f32(<4 x float> %x) %a = call <4 x float> @llvm.roundeven.v4f32(<4 x float> %x)
ret <4 x float> %a ret <4 x float> %a
} }
define <2 x double> @roundeven_v2f64(<2 x double> %x) { define <2 x double> @roundeven_v2f64(<2 x double> %x) {
; SSE2-LABEL: roundeven_v2f64: ; SSE2-LABEL: roundeven_v2f64:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
; SSE2-NEXT: subq $40, %rsp ; SSE2-NEXT: subq $40, %rsp
; SSE2-NEXT: .cfi_def_cfa_offset 48 ; SSE2-NEXT: .cfi_def_cfa_offset 48
; SSE2-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill ; SSE2-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE2-NEXT: callq _roundeven ; SSE2-NEXT: callq _roundeven
; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE2-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload ; SSE2-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] ; SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE2-NEXT: callq _roundeven ; SSE2-NEXT: callq _roundeven
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE2-NEXT: movaps %xmm1, %xmm0 ; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: addq $40, %rsp ; SSE2-NEXT: addq $40, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v2f64: ; SSE41-LABEL: roundeven_v2f64:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $40, %rsp ; SSE41-NEXT: roundpd $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 48
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps %xmm1, %xmm0
; SSE41-NEXT: addq $40, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_v2f64: ; AVX-LABEL: roundeven_v2f64:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: subq $40, %rsp ; AVX-NEXT: vroundpd $8, %xmm0, %xmm0
; AVX-NEXT: .cfi_def_cfa_offset 48
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, (%rsp), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: retq ; AVX-NEXT: retq
%a = call <2 x double> @llvm.roundeven.v2f64(<2 x double> %x) %a = call <2 x double> @llvm.roundeven.v2f64(<2 x double> %x)
ret <2 x double> %a ret <2 x double> %a
} }
define <8 x float> @roundeven_v8f32(<8 x float> %x) { define <8 x float> @roundeven_v8f32(<8 x float> %x) {
; SSE2-LABEL: roundeven_v8f32: ; SSE2-LABEL: roundeven_v8f32:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; SSE2-NEXT: unpcklpd (%rsp), %xmm1 ## 16-byte Folded Reload ; SSE2-NEXT: unpcklpd (%rsp), %xmm1 ## 16-byte Folded Reload
; SSE2-NEXT: ## xmm1 = xmm1[0],mem[0] ; SSE2-NEXT: ## xmm1 = xmm1[0],mem[0]
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE2-NEXT: addq $72, %rsp ; SSE2-NEXT: addq $72, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v8f32: ; SSE41-LABEL: roundeven_v8f32:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $56, %rsp ; SSE41-NEXT: roundps $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 64 ; SSE41-NEXT: roundps $8, %xmm1, %xmm1
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movshdup (%rsp), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: addq $56, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_v8f32: ; AVX-LABEL: roundeven_v8f32:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: subq $88, %rsp ; AVX-NEXT: vroundps $8, %ymm0, %ymm0
; AVX-NEXT: .cfi_def_cfa_offset 96
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: vzeroupper
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX-NEXT: callq _roundevenf
; AVX-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX-NEXT: addq $88, %rsp
; AVX-NEXT: retq ; AVX-NEXT: retq
%a = call <8 x float> @llvm.roundeven.v8f32(<8 x float> %x) %a = call <8 x float> @llvm.roundeven.v8f32(<8 x float> %x)
ret <8 x float> %a ret <8 x float> %a
} }
define <4 x double> @roundeven_v4f64(<4 x double> %x) { define <4 x double> @roundeven_v4f64(<4 x double> %x) {
; SSE2-LABEL: roundeven_v4f64: ; SSE2-LABEL: roundeven_v4f64:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
Show All 18 Lines
; SSE2-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload ; SSE2-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE2-NEXT: addq $56, %rsp ; SSE2-NEXT: addq $56, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v4f64: ; SSE41-LABEL: roundeven_v4f64:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $56, %rsp ; SSE41-NEXT: roundpd $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 64 ; SSE41-NEXT: roundpd $8, %xmm1, %xmm1
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: addq $56, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX-LABEL: roundeven_v4f64: ; AVX-LABEL: roundeven_v4f64:
; AVX: ## %bb.0: ; AVX: ## %bb.0:
; AVX-NEXT: subq $88, %rsp ; AVX-NEXT: vroundpd $8, %ymm0, %ymm0
; AVX-NEXT: .cfi_def_cfa_offset 96
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vzeroupper
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, (%rsp), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX-NEXT: ## xmm0 = mem[1,0]
; AVX-NEXT: callq _roundeven
; AVX-NEXT: vmovapd (%rsp), %xmm1 ## 16-byte Reload
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX-NEXT: addq $88, %rsp
; AVX-NEXT: retq ; AVX-NEXT: retq
%a = call <4 x double> @llvm.roundeven.v4f64(<4 x double> %x) %a = call <4 x double> @llvm.roundeven.v4f64(<4 x double> %x)
ret <4 x double> %a ret <4 x double> %a
} }
define <16 x float> @roundeven_v16f32(<16 x float> %x) { define <16 x float> @roundeven_v16f32(<16 x float> %x) {
; SSE2-LABEL: roundeven_v16f32: ; SSE2-LABEL: roundeven_v16f32:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE2-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload ; SSE2-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload
; SSE2-NEXT: addq $104, %rsp ; SSE2-NEXT: addq $104, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v16f32: ; SSE41-LABEL: roundeven_v16f32:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $88, %rsp ; SSE41-NEXT: roundps $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 96 ; SSE41-NEXT: roundps $8, %xmm1, %xmm1
; SSE41-NEXT: movaps %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; SSE41-NEXT: roundps $8, %xmm2, %xmm2
; SSE41-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; SSE41-NEXT: roundps $8, %xmm3, %xmm3
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movshdup (%rsp), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; SSE41-NEXT: ## xmm0 = mem[1,1,3,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE41-NEXT: callq _roundevenf
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 ## 16-byte Reload
; SSE41-NEXT: insertps {{.*#+}} xmm3 = xmm3[0,1,2],xmm0[0]
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload
; SSE41-NEXT: addq $88, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX1-LABEL: roundeven_v16f32: ; AVX1-LABEL: roundeven_v16f32:
; AVX1: ## %bb.0: ; AVX1: ## %bb.0:
; AVX1-NEXT: subq $152, %rsp ; AVX1-NEXT: vroundps $8, %ymm0, %ymm0
; AVX1-NEXT: .cfi_def_cfa_offset 160 ; AVX1-NEXT: vroundps $8, %ymm1, %ymm1
; AVX1-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX1-NEXT: callq _roundevenf
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm1 ## 16-byte Folded Reload
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: addq $152, %rsp
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX512-LABEL: roundeven_v16f32: ; AVX512-LABEL: roundeven_v16f32:
; AVX512: ## %bb.0: ; AVX512: ## %bb.0:
; AVX512-NEXT: subq $184, %rsp ; AVX512-NEXT: vrndscaleps $8, %zmm0, %zmm0
; AVX512-NEXT: .cfi_def_cfa_offset 192
; AVX512-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 64-byte Spill
; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX512-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX512-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,1,3,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilps $231, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[3,1,2,3]
; AVX512-NEXT: callq _roundevenf
; AVX512-NEXT: vmovaps (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
; AVX512-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX512-NEXT: vinsertf64x4 $1, {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm0 ## 32-byte Folded Reload
; AVX512-NEXT: addq $184, %rsp
; AVX512-NEXT: retq ; AVX512-NEXT: retq
%a = call <16 x float> @llvm.roundeven.v16f32(<16 x float> %x) %a = call <16 x float> @llvm.roundeven.v16f32(<16 x float> %x)
ret <16 x float> %a ret <16 x float> %a
} }
define <8 x double> @roundeven_v8f64(<8 x double> %x) { define <8 x double> @roundeven_v8f64(<8 x double> %x) {
; SSE2-LABEL: roundeven_v8f64: ; SSE2-LABEL: roundeven_v8f64:
; SSE2: ## %bb.0: ; SSE2: ## %bb.0:
Show All 40 Lines
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload ; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE2-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload ; SSE2-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload
; SSE2-NEXT: addq $88, %rsp ; SSE2-NEXT: addq $88, %rsp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: roundeven_v8f64: ; SSE41-LABEL: roundeven_v8f64:
; SSE41: ## %bb.0: ; SSE41: ## %bb.0:
; SSE41-NEXT: subq $88, %rsp ; SSE41-NEXT: roundpd $8, %xmm0, %xmm0
; SSE41-NEXT: .cfi_def_cfa_offset 96 ; SSE41-NEXT: roundpd $8, %xmm1, %xmm1
; SSE41-NEXT: movaps %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; SSE41-NEXT: roundpd $8, %xmm2, %xmm2
; SSE41-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; SSE41-NEXT: roundpd $8, %xmm3, %xmm3
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps (%rsp), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE41-NEXT: movaps %xmm1, (%rsp) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE41-NEXT: callq _roundeven
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 ## 16-byte Reload
; SSE41-NEXT: movlhps {{.*#+}} xmm3 = xmm3[0],xmm0[0]
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; SSE41-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; SSE41-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload
; SSE41-NEXT: addq $88, %rsp
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; AVX1-LABEL: roundeven_v8f64: ; AVX1-LABEL: roundeven_v8f64:
; AVX1: ## %bb.0: ; AVX1: ## %bb.0:
; AVX1-NEXT: subq $120, %rsp ; AVX1-NEXT: vroundpd $8, %ymm0, %ymm0
; AVX1-NEXT: .cfi_def_cfa_offset 128 ; AVX1-NEXT: vroundpd $8, %ymm1, %ymm1
; AVX1-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, (%rsp), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovapd (%rsp), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX1-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, (%rsp), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: ## kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX1-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX1-NEXT: ## xmm0 = mem[1,0]
; AVX1-NEXT: callq _roundeven
; AVX1-NEXT: vmovapd (%rsp), %xmm1 ## 16-byte Reload
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm1 ## 16-byte Folded Reload
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 ## 32-byte Reload
; AVX1-NEXT: addq $120, %rsp
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX512-LABEL: roundeven_v8f64: ; AVX512-LABEL: roundeven_v8f64:
; AVX512: ## %bb.0: ; AVX512: ## %bb.0:
; AVX512-NEXT: subq $184, %rsp ; AVX512-NEXT: vrndscalepd $8, %zmm0, %zmm0
; AVX512-NEXT: .cfi_def_cfa_offset 192
; AVX512-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 64-byte Spill
; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, (%rsp), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovapd (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT: vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX512-NEXT: vmovupd %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 32-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovaps %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovapd (%rsp), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT: vmovapd %xmm0, (%rsp) ## 16-byte Spill
; AVX512-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 ## 64-byte Reload
; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; AVX512-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; AVX512-NEXT: ## xmm0 = mem[1,0]
; AVX512-NEXT: callq _roundeven
; AVX512-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 ## 16-byte Folded Reload
; AVX512-NEXT: vinsertf64x4 $1, {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm0 ## 32-byte Folded Reload
; AVX512-NEXT: addq $184, %rsp
; AVX512-NEXT: retq ; AVX512-NEXT: retq
%a = call <8 x double> @llvm.roundeven.v8f64(<8 x double> %x) %a = call <8 x double> @llvm.roundeven.v8f64(<8 x double> %x)
ret <8 x double> %a ret <8 x double> %a
} }
declare float @llvm.roundeven.f32(float) declare float @llvm.roundeven.f32(float)
declare double @llvm.roundeven.f64(double) declare double @llvm.roundeven.f64(double)
declare <4 x float> @llvm.roundeven.v4f32(<4 x float>) declare <4 x float> @llvm.roundeven.v4f32(<4 x float>)
declare <2 x double> @llvm.roundeven.v2f64(<2 x double>) declare <2 x double> @llvm.roundeven.v2f64(<2 x double>)
declare <8 x float> @llvm.roundeven.v8f32(<8 x float>) declare <8 x float> @llvm.roundeven.v8f32(<8 x float>)
declare <4 x double> @llvm.roundeven.v4f64(<4 x double>) declare <4 x double> @llvm.roundeven.v4f64(<4 x double>)
declare <16 x float> @llvm.roundeven.v16f32(<16 x float>) declare <16 x float> @llvm.roundeven.v16f32(<16 x float>)
declare <8 x double> @llvm.roundeven.v8f64(<8 x double>) declare <8 x double> @llvm.roundeven.v8f64(<8 x double>)

llvm/test/CodeGen/X86/fp-strict-scalar-round.ll

Show First 20 Lines • Show All 585 Lines • ▼ Show 20 Lines
} }
define float @froundeven32(float %f) #0 { define float @froundeven32(float %f) #0 {
; SSE41-X86-LABEL: froundeven32: ; SSE41-X86-LABEL: froundeven32:
; SSE41-X86: # %bb.0: ; SSE41-X86: # %bb.0:
; SSE41-X86-NEXT: pushl %eax ; SSE41-X86-NEXT: pushl %eax
; SSE41-X86-NEXT: .cfi_def_cfa_offset 8 ; SSE41-X86-NEXT: .cfi_def_cfa_offset 8
; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE41-X86-NEXT: roundss $8, %xmm0, %xmm0
; SSE41-X86-NEXT: movss %xmm0, (%esp) ; SSE41-X86-NEXT: movss %xmm0, (%esp)
; SSE41-X86-NEXT: calll roundevenf ; SSE41-X86-NEXT: flds (%esp)
; SSE41-X86-NEXT: wait
; SSE41-X86-NEXT: popl %eax ; SSE41-X86-NEXT: popl %eax
; SSE41-X86-NEXT: .cfi_def_cfa_offset 4 ; SSE41-X86-NEXT: .cfi_def_cfa_offset 4
; SSE41-X86-NEXT: retl ; SSE41-X86-NEXT: retl
; ;
; SSE41-X64-LABEL: froundeven32: ; SSE41-X64-LABEL: froundeven32:
; SSE41-X64: # %bb.0: ; SSE41-X64: # %bb.0:
; SSE41-X64-NEXT: pushq %rax ; SSE41-X64-NEXT: roundss $8, %xmm0, %xmm0
; SSE41-X64-NEXT: .cfi_def_cfa_offset 16
; SSE41-X64-NEXT: callq roundevenf
; SSE41-X64-NEXT: popq %rax
; SSE41-X64-NEXT: .cfi_def_cfa_offset 8
; SSE41-X64-NEXT: retq ; SSE41-X64-NEXT: retq
; ;
; AVX-X86-LABEL: froundeven32: ; AVX-X86-LABEL: froundeven32:
; AVX-X86: # %bb.0: ; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %eax ; AVX-X86-NEXT: pushl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 8 ; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-X86-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
; AVX-X86-NEXT: vmovss %xmm0, (%esp) ; AVX-X86-NEXT: vmovss %xmm0, (%esp)
; AVX-X86-NEXT: calll roundevenf ; AVX-X86-NEXT: flds (%esp)
; AVX-X86-NEXT: wait
; AVX-X86-NEXT: popl %eax ; AVX-X86-NEXT: popl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 4 ; AVX-X86-NEXT: .cfi_def_cfa_offset 4
; AVX-X86-NEXT: retl ; AVX-X86-NEXT: retl
; ;
; AVX-X64-LABEL: froundeven32: ; AVX-X64-LABEL: froundeven32:
; AVX-X64: # %bb.0: ; AVX-X64: # %bb.0:
; AVX-X64-NEXT: pushq %rax ; AVX-X64-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
; AVX-X64-NEXT: .cfi_def_cfa_offset 16
; AVX-X64-NEXT: callq roundevenf
; AVX-X64-NEXT: popq %rax
; AVX-X64-NEXT: .cfi_def_cfa_offset 8
; AVX-X64-NEXT: retq ; AVX-X64-NEXT: retq
%res = call float @llvm.experimental.constrained.roundeven.f32( %res = call float @llvm.experimental.constrained.roundeven.f32(
float %f, metadata !"fpexcept.strict") #0 float %f, metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define double @froundevenf64(double %f) #0 { define double @froundevenf64(double %f) #0 {
; SSE41-X86-LABEL: froundevenf64: ; SSE41-X86-LABEL: froundevenf64:
; SSE41-X86: # %bb.0: ; SSE41-X86: # %bb.0:
; SSE41-X86-NEXT: pushl %ebp
; SSE41-X86-NEXT: .cfi_def_cfa_offset 8
; SSE41-X86-NEXT: .cfi_offset %ebp, -8
; SSE41-X86-NEXT: movl %esp, %ebp
; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp
; SSE41-X86-NEXT: andl $-8, %esp
; SSE41-X86-NEXT: subl $8, %esp ; SSE41-X86-NEXT: subl $8, %esp
; SSE41-X86-NEXT: .cfi_def_cfa_offset 12
; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE41-X86-NEXT: roundsd $8, %xmm0, %xmm0
; SSE41-X86-NEXT: movsd %xmm0, (%esp) ; SSE41-X86-NEXT: movsd %xmm0, (%esp)
; SSE41-X86-NEXT: calll roundeven ; SSE41-X86-NEXT: fldl (%esp)
; SSE41-X86-NEXT: addl $8, %esp ; SSE41-X86-NEXT: wait
; SSE41-X86-NEXT: .cfi_def_cfa_offset 4 ; SSE41-X86-NEXT: movl %ebp, %esp
; SSE41-X86-NEXT: popl %ebp
; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4
; SSE41-X86-NEXT: retl ; SSE41-X86-NEXT: retl
; ;
; SSE41-X64-LABEL: froundevenf64: ; SSE41-X64-LABEL: froundevenf64:
; SSE41-X64: # %bb.0: ; SSE41-X64: # %bb.0:
; SSE41-X64-NEXT: pushq %rax ; SSE41-X64-NEXT: roundsd $8, %xmm0, %xmm0
; SSE41-X64-NEXT: .cfi_def_cfa_offset 16
; SSE41-X64-NEXT: callq roundeven
; SSE41-X64-NEXT: popq %rax
; SSE41-X64-NEXT: .cfi_def_cfa_offset 8
; SSE41-X64-NEXT: retq ; SSE41-X64-NEXT: retq
; ;
; AVX-X86-LABEL: froundevenf64: ; AVX-X86-LABEL: froundevenf64:
; AVX-X86: # %bb.0: ; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %ebp
; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: .cfi_offset %ebp, -8
; AVX-X86-NEXT: movl %esp, %ebp
; AVX-X86-NEXT: .cfi_def_cfa_register %ebp
; AVX-X86-NEXT: andl $-8, %esp
; AVX-X86-NEXT: subl $8, %esp ; AVX-X86-NEXT: subl $8, %esp
; AVX-X86-NEXT: .cfi_def_cfa_offset 12
; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-X86-NEXT: vroundsd $8, %xmm0, %xmm0, %xmm0
; AVX-X86-NEXT: vmovsd %xmm0, (%esp) ; AVX-X86-NEXT: vmovsd %xmm0, (%esp)
; AVX-X86-NEXT: calll roundeven ; AVX-X86-NEXT: fldl (%esp)
; AVX-X86-NEXT: addl $8, %esp ; AVX-X86-NEXT: wait
; AVX-X86-NEXT: .cfi_def_cfa_offset 4 ; AVX-X86-NEXT: movl %ebp, %esp
; AVX-X86-NEXT: popl %ebp
; AVX-X86-NEXT: .cfi_def_cfa %esp, 4
; AVX-X86-NEXT: retl ; AVX-X86-NEXT: retl
; ;
; AVX-X64-LABEL: froundevenf64: ; AVX-X64-LABEL: froundevenf64:
; AVX-X64: # %bb.0: ; AVX-X64: # %bb.0:
; AVX-X64-NEXT: pushq %rax ; AVX-X64-NEXT: vroundsd $8, %xmm0, %xmm0, %xmm0
; AVX-X64-NEXT: .cfi_def_cfa_offset 16
; AVX-X64-NEXT: callq roundeven
; AVX-X64-NEXT: popq %rax
; AVX-X64-NEXT: .cfi_def_cfa_offset 8
; AVX-X64-NEXT: retq ; AVX-X64-NEXT: retq
%res = call double @llvm.experimental.constrained.roundeven.f64( %res = call double @llvm.experimental.constrained.roundeven.f64(
double %f, metadata !"fpexcept.strict") #0 double %f, metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp } attributes #0 = { strictfp }