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[AMDGPU][GlobalISel] Fix G_AMDGPU_TBUFFER_STORE_FORMAT mapping
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Authored by mbrkusanin on Jul 6 2020, 9:41 AM.

Details

Summary

Add missing mappings and tablegen definitions for TBUFFER_STORE_FORMAT.

Diff Detail

Event Timeline

mbrkusanin created this revision.Jul 6 2020, 9:41 AM
arsenm requested changes to this revision.Jul 6 2020, 12:52 PM
arsenm added inline comments.
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.d16.ll
1–4 ↗(On Diff #275740)

Can you move the -global-isel argument to the beginning?

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
2–4

Ditto (also space between ; and RUN)

32

You can just make the argument types the result instead of having the bitcast

76

Can you also add cases that require waterfall loops? I think the part to handle them is missing

This revision now requires changes to proceed.Jul 6 2020, 12:52 PM
mbrkusanin updated this revision to Diff 276677.Jul 9 2020, 2:44 AM
  • Updated tests.
  • Added tests with waterfall loops.
  • Changed them to -stop-after=instruction-select like others for GlobalISel.

Didn't know what waterfall loops were before. Let me know if all the necessary cases are covered.

arsenm accepted this revision.Jul 9 2020, 2:51 PM

LGTM. Apparently the cases to apply the mapping are somehow already there

This revision is now accepted and ready to land.Jul 9 2020, 2:51 PM
This revision was automatically updated to reflect the committed changes.