AMDGPU/GlobalISel: Select G_FREEZE

[Petar.Avramovic]

Summary

Select G_FREEZE in the same way that COPY is selected.

[arsenm]

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir

8

These are all VGPR cases; should also test AGPR, SGPR, and vcc cases

[Petar.Avramovic]

Add a few sgpr,agpr and vcc tests similar to ones from regbankselect-copy.mir. Original tests were from legalize-freeze.mir

[arsenm]

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir

39–41

A test with all preassigned banks isn't particularly interesting

81

Shouldn't have a pre-set bank here

[Petar.Avramovic]

Remove tests with preassigned banks, use icmp to produce vcc freeze. Add liveins to functions that didn't have them.

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

bool AMDGPUInstructionSelector::select(MachineInstr &I) {
   case TargetOpcode::G_UNMERGE_VALUES:
     return selectG_UNMERGE_VALUES(I);
   case TargetOpcode::G_BUILD_VECTOR_TRUNC:
     return selectG_BUILD_VECTOR_TRUNC(I);
   case TargetOpcode::G_PTR_ADD:
     return selectG_PTR_ADD(I);
   case TargetOpcode::G_IMPLICIT_DEF:
     return selectG_IMPLICIT_DEF(I);
+  case TargetOpcode::G_FREEZE:
+    return selectCOPY(I);
   case TargetOpcode::G_INSERT:
     return selectG_INSERT(I);
   case TargetOpcode::G_INTRINSIC:
     return selectG_INTRINSIC(I);
   case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:
     return selectG_INTRINSIC_W_SIDE_EFFECTS(I);
   case TargetOpcode::G_ICMP:
     if (selectG_ICMP(I))

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

 // Operands that must be SGPRs must accept potentially divergent VGPRs as
 // legal. These will be dealt with in applyMappingImpl.
 //
 const RegisterBankInfo::InstructionMapping &
 AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
   const MachineFunction &MF = *MI.getParent()->getParent();
   const MachineRegisterInfo &MRI = MF.getRegInfo();
 
-  if (MI.isCopy()) {
+  if (MI.isCopy() || MI.getOpcode() == AMDGPU::G_FREEZE) {
     // The default logic bothers to analyze impossible alternative mappings. We
     // want the most straightforward mapping, so just directly handle this.
     const RegisterBank *DstBank = getRegBank(MI.getOperand(0).getReg(), MRI,
                                              *TRI);
     const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI,
                                              *TRI);
     assert(SrcBank && "src bank should have been assigned already");
     if (!DstBank)
       DstBank = SrcBank;
 
     unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI);
     if (cannotCopy(*DstBank, *SrcBank, Size))
       return getInvalidInstructionMapping();
 
     const ValueMapping &ValMap = getValueMapping(0, Size, *DstBank);
+    unsigned OpdsMappingSize = MI.isCopy() ? 1 : 2;
+    SmallVector<const ValueMapping *, 1> OpdsMapping(OpdsMappingSize);
+    OpdsMapping[0] = &ValMap;
+    if (MI.getOpcode() == AMDGPU::G_FREEZE)
+      OpdsMapping[1] = &ValMap;
+
     return getInstructionMapping(
         1, /*Cost*/ 1,
-        /*OperandsMapping*/ getOperandsMapping({&ValMap}), 1);
+        /*OperandsMapping*/ getOperandsMapping(OpdsMapping), OpdsMappingSize);
   }
 
   if (MI.isRegSequence()) {
     // If any input is a VGPR, the result must be a VGPR. The default handling
     // assumes any copy between banks is legal.
     unsigned BankID = AMDGPU::SGPRRegBankID;
 
     for (unsigned I = 1, E = MI.getNumOperands(); I != E; I += 2) {

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GFX6 %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GFX6 %s
+# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select %s -o - |  FileCheck -check-prefix=GFX10 %s
+
+---
+name:            test_freeze_s1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s1
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s1
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s1) = G_TRUNC %0(s32)
+    %2:vgpr(s1) = G_FREEZE %1
+    %3:vgpr(s32) = G_ANYEXT %2(s1)
+    $vgpr0 = COPY %3(s32)
+...
+
+---
+name:            freeze_s1_sgpr_to_vcc_preassigned
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s1_sgpr_to_vcc_preassigned
+    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX6: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY]], implicit-def $scc
+    ; GFX6: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
+    ; GFX6: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX6: S_ENDPGM 0, implicit [[COPY1]]
+    ; GFX10-LABEL: name: freeze_s1_sgpr_to_vcc_preassigned
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX10: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY]], implicit-def $scc
+    ; GFX10: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
+    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX10: S_ENDPGM 0, implicit [[COPY1]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s1) = G_TRUNC %0(s32)
+    %3:vcc(s1) = COPY %1(s1)
+    %2:vcc(s1) = G_FREEZE %3
+    S_ENDPGM 0, implicit %2(s1)
+
+...
+---
+name:            freeze_s1_vgpr_to_vcc_preassigned
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s1_vgpr_to_vcc_preassigned
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec
+    ; GFX6: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[V_AND_B32_e32_]], implicit $exec
+    ; GFX6: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX6: S_ENDPGM 0, implicit [[COPY1]]
+    ; GFX10-LABEL: name: freeze_s1_vgpr_to_vcc_preassigned
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec
+    ; GFX10: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[V_AND_B32_e32_]], implicit $exec
+    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX10: S_ENDPGM 0, implicit [[COPY1]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s1) = G_TRUNC %0(s32)
+    %3:vcc(s1) = COPY %1(s1)
+    %2:vcc(s1) = G_FREEZE %3
+    S_ENDPGM 0, implicit %2(s1)
+
+...
+---
+name:            freeze_s1_sgpr_to_vcc
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s1_sgpr_to_vcc
+    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX6: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY]], implicit-def $scc
+    ; GFX6: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
+    ; GFX6: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX6: S_ENDPGM 0, implicit [[COPY1]]
+    ; GFX10-LABEL: name: freeze_s1_sgpr_to_vcc
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX10: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY]], implicit-def $scc
+    ; GFX10: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
+    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX10: S_ENDPGM 0, implicit [[COPY1]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s1) = G_TRUNC %0(s32)
+    %3:vcc(s1) = COPY %1(s1)
+    %2:vcc(s1) = G_FREEZE %3
+    S_ENDPGM 0, implicit %2(s1)
+
+...
+---
+name:            freeze_s1_vgpr_to_vcc
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s1_vgpr_to_vcc
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec
+    ; GFX6: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[V_AND_B32_e32_]], implicit $exec
+    ; GFX6: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX6: S_ENDPGM 0, implicit [[COPY1]]
+    ; GFX10-LABEL: name: freeze_s1_vgpr_to_vcc
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec
+    ; GFX10: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[V_AND_B32_e32_]], implicit $exec
+    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[V_CMP_NE_U32_e64_]]
+    ; GFX10: S_ENDPGM 0, implicit [[COPY1]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s1) = G_TRUNC %0(s32)
+    %3:vcc(s1) = COPY %1(s1)
+    %2:vcc(s1) = G_FREEZE %3
+    S_ENDPGM 0, implicit %2(s1)
+
+...
+
+---
+name:            test_freeze_s16
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s16
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s16
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s16) = G_TRUNC %0(s32)
+    %2:vgpr(s16) = G_FREEZE %1
+    %3:vgpr(s32) = G_ANYEXT %2(s16)
+    $vgpr0 = COPY %3(s32)
+...
+
+---
+name:            test_freeze_s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s32
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+...
+
+---
+name:            freeze_s32_sgpr_to_sgpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_sgpr_to_sgpr
+    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX6: $sgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_sgpr_to_sgpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX10: $sgpr0 = COPY [[COPY]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s32) = G_FREEZE %0
+    $sgpr0 = COPY %1(s32)
+
+...
+---
+name:            freeze_s32_sgpr_to_vgpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_sgpr_to_vgpr
+    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_sgpr_to_vgpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+
+...
+---
+name:            freeze_s32_vgpr_to_agpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_vgpr_to_agpr
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $agpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_vgpr_to_agpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $agpr0 = COPY [[COPY]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+---
+name:            freeze_s32_sgpr_to_agpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_sgpr_to_agpr
+    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX6: $agpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_sgpr_to_agpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; GFX10: $agpr0 = COPY [[COPY]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+---
+name:            freeze_s32_agpr_to_vgpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_agpr_to_vgpr
+    ; GFX6: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_agpr_to_vgpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:agpr(s32) = COPY $agpr0
+    %1:agpr(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+
+...
+---
+name:            freeze_s32_agpr_to_agpr
+alignment:       1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: freeze_s32_agpr_to_agpr
+    ; GFX6: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
+    ; GFX6: $agpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: freeze_s32_agpr_to_agpr
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
+    ; GFX10: $agpr0 = COPY [[COPY]]
+    %0:agpr(s32) = COPY $agpr0
+    %1:agpr(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+
+---
+name:            test_freeze_s64
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s64
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s64
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(s64) = COPY $vgpr0_vgpr1
+    %1:vgpr(s64) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(s64)
+...
+
+---
+name:            test_freeze_s128
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s128
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s128
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    %0:vgpr(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:vgpr(s128) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(s128)
+...
+
+---
+name:            test_freeze_256
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_256
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_256
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
+    %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    %1:vgpr(s256) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(s256)
+...
+
+---
+name:            test_freeze_s512
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_s512
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_s512
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
+    %0:vgpr(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    %1:vgpr(s512) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(s512)
+...
+
+---
+name:            test_freeze_v2s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v2s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v2s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
+    %1:vgpr(<2 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(<2 x s32>)
+...
+
+---
+name:            test_freeze_v3s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v3s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
+    ; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v3s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
+    ; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
+    %0:vgpr(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
+    %1:vgpr(<3 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2 = COPY %1(<3 x s32>)
+...
+
+---
+name:            test_freeze_v4s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v4s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v4s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    %0:vgpr(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:vgpr(<4 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<4 x s32>)
+...
+
+---
+name:            test_freeze_v5s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v5s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v5s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[COPY]]
+    %0:vgpr(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
+    %1:vgpr(<5 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY %1(<5 x s32>)
+...
+
+---
+name:            test_freeze_v8s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v8s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v8s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
+    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    %1:vgpr(<8 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(<8 x s32>)
+...
+
+---
+name:            test_freeze_v16s32
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v16s32
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v16s32
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
+    %0:vgpr(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    %1:vgpr(<16 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(<16 x s32>)
+
+...
+
+---
+name:            test_freeze_v2s16
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v2s16
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v2s16
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(<2 x s16>) = COPY $vgpr0
+    %1:vgpr(<2 x s16>) = G_FREEZE %0
+    $vgpr0 = COPY %1(<2 x s16>)
+...
+
+---
+name:            test_freeze_v4s16
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v4s16
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v4s16
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
+    %1:vgpr(<4 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(<4 x s16>)
+...
+
+---
+name:            test_freeze_v6s16
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v6s16
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
+    ; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v6s16
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
+    ; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
+    %0:vgpr(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
+    %1:vgpr(<6 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2 = COPY %1(<6 x s16>)
+
+...
+---
+name:            test_freeze_v8s16
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v8s16
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v8s16
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    %0:vgpr(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:vgpr(<8 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<8 x s16>)
+...
+
+---
+name:            test_freeze_v2s64
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_v2s64
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_v2s64
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
+    %0:vgpr(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:vgpr(<2 x s64>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<2 x s64>)
+...
+
+---
+name:            test_freeze_p0
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p0
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p0
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(p0) = COPY $vgpr0_vgpr1
+    %1:vgpr(p0) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p0)
+...
+
+---
+name:            test_freeze_p1
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p1
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p1
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(p1) = COPY $vgpr0_vgpr1
+    %1:vgpr(p1) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p1)
+...
+
+---
+name:            test_freeze_p2
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p2
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p2
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(p2) = COPY $vgpr0
+    %1:vgpr(p2) = G_FREEZE %0
+    $vgpr0 = COPY %1(p2)
+...
+
+---
+name:            test_freeze_p3
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p3
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p3
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(p3) = COPY $vgpr0
+    %1:vgpr(p3) = G_FREEZE %0
+    $vgpr0 = COPY %1(p3)
+...
+
+---
+name:            test_freeze_p4
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p4
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p4
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(p4) = COPY $vgpr0_vgpr1
+    %1:vgpr(p4) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p4)
+...
+
+---
+name:            test_freeze_p5
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p5
+    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX6: $vgpr0 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p5
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX10: $vgpr0 = COPY [[COPY]]
+    %0:vgpr(p5) = COPY $vgpr0
+    %1:vgpr(p5) = G_FREEZE %0
+    $vgpr0 = COPY %1(p5)
+...
+
+---
+name:            test_freeze_p999
+legalized:       true
+regBankSelected: true
+
+body: |
+  bb.0:
+
+    ; GFX6-LABEL: name: test_freeze_p999
+    ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
+    ; GFX10-LABEL: name: test_freeze_p999
+    ; GFX10: $vcc_hi = IMPLICIT_DEF
+    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
+    %0:vgpr(p999) = COPY $vgpr0_vgpr1
+    %1:vgpr(p999) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p999)
+...

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=regbankselect %s -o - | FileCheck %s
+
+---
+name:            test_freeze_s1
+legalized:       true
+
+body: |
+  bb.0:
+
+    ; CHECK-LABEL: name: test_freeze_s1
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s1) = G_FREEZE [[TRUNC]]
+    ; CHECK: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FREEZE]](s1)
+    ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s1) = G_TRUNC %0(s32)
+    %2:_(s1) = G_FREEZE %1
+    %3:_(s32) = G_ANYEXT %2(s1)
+    $vgpr0 = COPY %3(s32)
+...
+
+---
+name: freeze_s1_sgpr_to_vcc_preassigned
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+    ; CHECK-LABEL: name: freeze_s1_sgpr_to_vcc_preassigned
+    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vcc(s1) = G_FREEZE [[COPY1]]
+    ; CHECK: S_ENDPGM 0, implicit [[FREEZE]](s1)
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:sgpr(s1) = G_TRUNC %0
+    %2:vcc(s1) = G_FREEZE %1
+    S_ENDPGM 0, implicit %2
+...
+
+---
+name: freeze_s1_vgpr_to_vcc_preassigned
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; CHECK-LABEL: name: freeze_s1_vgpr_to_vcc_preassigned
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vcc(s1) = G_FREEZE [[COPY1]]
+    ; CHECK: S_ENDPGM 0, implicit [[FREEZE]](s1)
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s1) = G_TRUNC %0
+    %2:vcc(s1) = G_FREEZE %1
+    S_ENDPGM 0, implicit %2
+...
+
+---
+name: freeze_s1_sgpr_to_vcc
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: freeze_s1_sgpr_to_vcc
+    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vcc(s1) = G_FREEZE [[COPY1]]
+    ; CHECK: S_ENDPGM 0, implicit [[FREEZE]](s1)
+    %0:_(s32) = COPY $sgpr0
+    %1:_(s1) = G_TRUNC %0
+    %2:vcc(s1) = G_FREEZE %1
+    S_ENDPGM 0, implicit %2
+...
+
+---
+name: freeze_s1_vgpr_to_vcc
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; CHECK-LABEL: name: freeze_s1_vgpr_to_vcc
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vcc(s1) = G_FREEZE [[COPY1]]
+    ; CHECK: S_ENDPGM 0, implicit [[FREEZE]](s1)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s1) = G_TRUNC %0
+    %2:vcc(s1) = G_FREEZE %1
+    S_ENDPGM 0, implicit %2
+...
+
+---
+name:            test_freeze_s16
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_s16
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s16) = G_FREEZE [[TRUNC]]
+    ; CHECK: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FREEZE]](s16)
+    ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s16) = G_TRUNC %0(s32)
+    %2:_(s16) = G_FREEZE %1
+    %3:_(s32) = G_ANYEXT %2(s16)
+    $vgpr0 = COPY %3(s32)
+...
+
+---
+name:            test_freeze_s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+...
+
+---
+name: freeze_s32_sgpr_to_sgpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: freeze_s32_sgpr_to_sgpr
+    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:sgpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $sgpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $sgpr0
+    %1:_(s32) = G_FREEZE %0
+    $sgpr0 = COPY %1(s32)
+
+...
+
+---
+name: freeze_s32_sgpr_to_vgpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: freeze_s32_sgpr_to_vgpr
+    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:sgpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $sgpr0
+    %1:_(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+
+...
+
+---
+name: freeze_s32_vgpr_to_agpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; CHECK-LABEL: name: freeze_s32_vgpr_to_agpr
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $agpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+
+---
+name: freeze_s32_sgpr_to_agpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: freeze_s32_sgpr_to_agpr
+    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:sgpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $agpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $sgpr0
+    %1:_(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+
+---
+name: freeze_s32_agpr_to_vgpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $agpr0
+
+    ; CHECK-LABEL: name: freeze_s32_agpr_to_vgpr
+    ; CHECK: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:agpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $agpr0
+    %1:_(s32) = G_FREEZE %0
+    $vgpr0 = COPY %1(s32)
+
+...
+
+---
+name: freeze_s32_agpr_to_agpr
+legalized: true
+
+body: |
+  bb.0:
+    liveins: $agpr0
+
+    ; CHECK-LABEL: name: freeze_s32_agpr_to_agpr
+    ; CHECK: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:agpr(s32) = G_FREEZE [[COPY]]
+    ; CHECK: $agpr0 = COPY [[FREEZE]](s32)
+    %0:_(s32) = COPY $agpr0
+    %1:_(s32) = G_FREEZE %0
+    $agpr0 = COPY %1(s32)
+
+...
+
+---
+name:            test_freeze_s64
+legalized:       true
+
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_s64
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s64) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](s64)
+    %0:_(s64) = COPY $vgpr0_vgpr1
+    %1:_(s64) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(s64)
+...
+
+---
+name:            test_freeze_s128
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_s128
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s128) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](s128)
+    %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:_(s128) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(s128)
+...
+
+---
+name:            test_freeze_256
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_256
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s256) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[FREEZE]](s256)
+    %0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    %1:_(s256) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(s256)
+...
+
+---
+name:            test_freeze_s512
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_s512
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(s512) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[FREEZE]](s512)
+    %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    %1:_(s512) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(s512)
+...
+
+---
+name:            test_freeze_v2s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v2s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<2 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](<2 x s32>)
+    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
+    %1:_(<2 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(<2 x s32>)
+...
+
+---
+name:            test_freeze_v3s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v3s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<3 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[FREEZE]](<3 x s32>)
+    %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
+    %1:_(<3 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2 = COPY %1(<3 x s32>)
+...
+
+---
+name:            test_freeze_v4s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v4s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<4 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<4 x s32>)
+    %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:_(<4 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<4 x s32>)
+...
+
+---
+name:            test_freeze_v5s32
+legalized:       true
+
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v5s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<5 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[FREEZE]](<5 x s32>)
+    %0:_(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
+    %1:_(<5 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY %1(<5 x s32>)
+...
+
+---
+name:            test_freeze_v8s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v8s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<8 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[FREEZE]](<8 x s32>)
+    %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+    %1:_(<8 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(<8 x s32>)
+...
+
+---
+name:            test_freeze_v16s32
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v16s32
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<16 x s32>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[FREEZE]](<16 x s32>)
+    %0:_(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+    %1:_(<16 x s32>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(<16 x s32>)
+...
+
+---
+name:            test_freeze_v2s16
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v2s16
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<2 x s16>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](<2 x s16>)
+    %0:_(<2 x s16>) = COPY $vgpr0
+    %1:_(<2 x s16>) = G_FREEZE %0
+    $vgpr0 = COPY %1(<2 x s16>)
+...
+
+---
+name:            test_freeze_v4s16
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v4s16
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<4 x s16>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](<4 x s16>)
+    %0:_(<4 x s16>) = COPY $vgpr0_vgpr1
+    %1:_(<4 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(<4 x s16>)
+...
+
+---
+name:            test_freeze_v6s16
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v6s16
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<6 x s16>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[FREEZE]](<6 x s16>)
+    %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
+    %1:_(<6 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2 = COPY %1(<6 x s16>)
+...
+
+---
+name:            test_freeze_v8s16
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v8s16
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<8 x s16>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<8 x s16>)
+    %0:_(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:_(<8 x s16>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<8 x s16>)
+...
+
+---
+name:            test_freeze_v2s64
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_v2s64
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(<2 x s64>) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<2 x s64>)
+    %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+    %1:_(<2 x s64>) = G_FREEZE %0
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<2 x s64>)
+...
+
+---
+name:            test_freeze_p0
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p0
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p0) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p0)
+    %0:_(p0) = COPY $vgpr0_vgpr1
+    %1:_(p0) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p0)
+...
+
+---
+name:            test_freeze_p1
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p1
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p1) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p1)
+    %0:_(p1) = COPY $vgpr0_vgpr1
+    %1:_(p1) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p1)
+...
+
+---
+name:            test_freeze_p2
+legalized:       true
+
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p2
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p2) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](p2)
+    %0:_(p2) = COPY $vgpr0
+    %1:_(p2) = G_FREEZE %0
+    $vgpr0 = COPY %1(p2)
+...
+
+---
+name:            test_freeze_p3
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p3
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p3) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](p3)
+    %0:_(p3) = COPY $vgpr0
+    %1:_(p3) = G_FREEZE %0
+    $vgpr0 = COPY %1(p3)
+...
+
+---
+name:            test_freeze_p4
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p4
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p4) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p4) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p4)
+    %0:_(p4) = COPY $vgpr0_vgpr1
+    %1:_(p4) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p4)
+...
+
+---
+name:            test_freeze_p5
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p5
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p5) = COPY $vgpr0
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p5) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0 = COPY [[FREEZE]](p5)
+    %0:_(p5) = COPY $vgpr0
+    %1:_(p5) = G_FREEZE %0
+    $vgpr0 = COPY %1(p5)
+...
+
+---
+name:            test_freeze_p999
+legalized:       true
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_freeze_p999
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr(p999) = COPY $vgpr0_vgpr1
+    ; CHECK: [[FREEZE:%[0-9]+]]:vgpr(p999) = G_FREEZE [[COPY]]
+    ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p999)
+    %0:_(p999) = COPY $vgpr0_vgpr1
+    %1:_(p999) = G_FREEZE %0
+    $vgpr0_vgpr1 = COPY %1(p999)
+...