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[VE] Support I32/F32 registers in assembler parser
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Authored by kaz7 on May 28 2020, 9:02 PM.

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Summary

Support I32/F32 registers in assembler parser and add regression
tests of LD/ST instructions.

Depends on D79546.

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Event Timeline

kaz7 created this revision.May 28 2020, 9:02 PM
kaz7 updated this revision to Diff 267120.May 28 2020, 9:55 PM

Add missing modifications.

kaz7 retitled this revision from [VE] Add regression tests for LD/ST instructions to [VE] Support I32/F32 registers in assembler parser.May 28 2020, 9:56 PM
kaz7 edited the summary of this revision. (Show Details)
simoll accepted this revision.May 29 2020, 6:13 AM
This revision is now accepted and ready to land.May 29 2020, 6:13 AM
kaz7 updated this revision to Diff 267332.May 29 2020, 12:32 PM
kaz7 retitled this revision from [VE] Support I32/F32 registers in assembler parser to [VE] Support I32/F32 registers in assembler parser.

Rebase

This revision was automatically updated to reflect the committed changes.