This is inefficient for MIPS and highly inefficient for CHERI since we
don't have lwl/lwr so fall back to byte loads for align == 1.
Details
Details
- Reviewers
- None
- Commits
- rG3fc738846e15: [MIPS] Add a baseline test showing current inefficient hidden sret lowering
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo