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Differential D78677

[SveEmitter] Add builtins for gather prefetches
ClosedPublic

Authored by sdesmalen on Apr 22 2020, 2:43 PM.

Details

Reviewers
SjoerdMeijer
efriedma
Commits
rG42a56bf63f69: [SveEmitter] Add builtins for gather prefetches

Diff Detail

Event Timeline

sdesmalen created this revision.Apr 22 2020, 2:43 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 22 2020, 2:43 PM
Herald added a subscriber: tschuett. · View Herald Transcript
sdesmalen added a parent revision: D78674: [SveEmitter] Add builtins for contiguous prefetches.Apr 22 2020, 2:44 PM
Harbormaster failed remote builds in B54316: Diff 259404!Apr 22 2020, 3:48 PM
sdesmalen updated this revision to Diff 259589.Apr 23 2020, 8:57 AM
  • Updated the tests to use SVE_ACLE_FUNC for the overloaded builtins.
efriedma accepted this revision.Apr 28 2020, 6:42 PM

LGTM with one minor comment

clang/lib/CodeGen/CGBuiltin.cpp
7739

} else {, so you aren't multiplying by zero?

This revision is now accepted and ready to land.Apr 28 2020, 6:42 PM
sdesmalen marked an inline comment as done.Apr 29 2020, 3:57 AM

Thanks for reviewing!

clang/lib/CodeGen/CGBuiltin.cpp
7739

Good catch, I've fixed that before committing.

Closed by commit rG42a56bf63f69: [SveEmitter] Add builtins for gather prefetches (authored by sdesmalen). · Explain WhyApr 29 2020, 4:15 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
clang/
include/
clang/
Basic/
1 line
36 lines
lib/
CodeGen/
35 lines
3 lines
test/
CodeGen/
aarch64-sve-intrinsics/
144 lines
148 lines
148 lines
148 lines
utils/
TableGen/
6 lines

Diff 259404

clang/include/clang/Basic/TargetBuiltins.h

Show First 20 Lines • Show All 235 Lines • ▼ Show 20 Lines#undef LLVM_GET_SVE_IMMCHECKTYPES
bool isOverloadNone() const { return Flags & IsOverloadNone; } bool isOverloadNone() const { return Flags & IsOverloadNone; }
bool isOverloadWhile() const { return Flags & IsOverloadWhile; } bool isOverloadWhile() const { return Flags & IsOverloadWhile; }
bool isOverloadDefault() const { return !(Flags & OverloadKindMask); } bool isOverloadDefault() const { return !(Flags & OverloadKindMask); }
bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; } bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; }
bool isOverloadCvt() const { return Flags & IsOverloadCvt; } bool isOverloadCvt() const { return Flags & IsOverloadCvt; }
bool isAppendSVALL() const { return Flags & IsAppendSVALL; } bool isAppendSVALL() const { return Flags & IsAppendSVALL; }
bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; } bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; }
bool isPrefetch() const { return Flags & IsPrefetch; } bool isPrefetch() const { return Flags & IsPrefetch; }
bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; }
uint64_t getBits() const { return Flags; } uint64_t getBits() const { return Flags; }
bool isFlagSet(uint64_t Flag) const { return Flags & Flag; } bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
}; };
/// Hexagon builtins /// Hexagon builtins
namespace Hexagon { namespace Hexagon {
enum { enum {
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clang/include/clang/Basic/arm_sve.td

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// C: pointer to int32_t // C: pointer to int32_t
// D: pointer to int64_t // D: pointer to int64_t
// E: pointer to uint8_t // E: pointer to uint8_t
// F: pointer to uint16_t // F: pointer to uint16_t
// G: pointer to uint32_t // G: pointer to uint32_t
// H: pointer to uint64_t // H: pointer to uint64_t
// Q: const pointer to void
// S: const pointer to int8_t // S: const pointer to int8_t
// T: const pointer to int16_t // T: const pointer to int16_t
// U: const pointer to int32_t // U: const pointer to int32_t
// V: const pointer to int64_t // V: const pointer to int64_t
// //
// W: const pointer to uint8_t // W: const pointer to uint8_t
// X: const pointer to uint16_t // X: const pointer to uint16_t
// Y: const pointer to uint32_t // Y: const pointer to uint32_t
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def IsOverloadWhile : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types. def IsOverloadWhile : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types.
def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types. def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types.
def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types. def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types.
def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type. def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type.
def IsByteIndexed : FlagType<0x01000000>; def IsByteIndexed : FlagType<0x01000000>;
def IsAppendSVALL : FlagType<0x02000000>; // Appends SV_ALL as the last operand. def IsAppendSVALL : FlagType<0x02000000>; // Appends SV_ALL as the last operand.
def IsInsertOp1SVALL : FlagType<0x04000000>; // Inserts SV_ALL as the second operand. def IsInsertOp1SVALL : FlagType<0x04000000>; // Inserts SV_ALL as the second operand.
def IsPrefetch : FlagType<0x08000000>; // Contiguous prefetches. def IsPrefetch : FlagType<0x08000000>; // Contiguous prefetches.
def IsGatherPrefetch : FlagType<0x10000000>;
// These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h
class ImmCheckType<int val> { class ImmCheckType<int val> {
int Value = val; int Value = val;
} }
def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns) def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns)
def ImmCheck1_16 : ImmCheckType<1>; // 1..16 def ImmCheck1_16 : ImmCheckType<1>; // 1..16
def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1) def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1)
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def SVPRFD : MInst<"svprfd", "vPcJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">; def SVPRFD : MInst<"svprfd", "vPcJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">;
// Prefetch (Scalar base, VL displacement) // Prefetch (Scalar base, VL displacement)
def SVPRFB_VNUM : MInst<"svprfb_vnum", "vPclJ", "c", [IsPrefetch], MemEltTyInt8, "aarch64_sve_prf">; def SVPRFB_VNUM : MInst<"svprfb_vnum", "vPclJ", "c", [IsPrefetch], MemEltTyInt8, "aarch64_sve_prf">;
def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPclJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">; def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPclJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">;
def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPclJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">; def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPclJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">;
def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPclJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">; def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPclJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">;
// Prefetch (Vector bases)
def SVPRFB_GATHER_BASES : MInst<"svprfb_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_scalar_offset">;
def SVPRFH_GATHER_BASES : MInst<"svprfh_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_scalar_offset">;
def SVPRFW_GATHER_BASES : MInst<"svprfw_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_scalar_offset">;
def SVPRFD_GATHER_BASES : MInst<"svprfd_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_scalar_offset">;
// Prefetch (Scalar base, Vector offsets)
def SVPRFB_GATHER_32B_OFFSETS_S : MInst<"svprfb_gather_[{3}]offset", "vPQdJ", "i", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_sxtw_index">;
def SVPRFH_GATHER_32B_OFFSETS_S : MInst<"svprfh_gather_[{3}]index", "vPQdJ", "i", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_sxtw_index">;
def SVPRFW_GATHER_32B_OFFSETS_S : MInst<"svprfw_gather_[{3}]index", "vPQdJ", "i", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_sxtw_index">;
def SVPRFD_GATHER_32B_OFFSETS_S : MInst<"svprfd_gather_[{3}]index", "vPQdJ", "i", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_sxtw_index">;
def SVPRFB_GATHER_64B_OFFSETS_S : MInst<"svprfb_gather_[{3}]offset", "vPQdJ", "l", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_index">;
def SVPRFH_GATHER_64B_OFFSETS_S : MInst<"svprfh_gather_[{3}]index", "vPQdJ", "l", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_index">;
def SVPRFW_GATHER_64B_OFFSETS_S : MInst<"svprfw_gather_[{3}]index", "vPQdJ", "l", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_index">;
def SVPRFD_GATHER_64B_OFFSETS_S : MInst<"svprfd_gather_[{3}]index", "vPQdJ", "l", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_index">;
def SVPRFB_GATHER_32B_OFFSETS_U : MInst<"svprfb_gather_[{3}]offset", "vPQdJ", "Ui", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_uxtw_index">;
def SVPRFH_GATHER_32B_OFFSETS_U : MInst<"svprfh_gather_[{3}]index", "vPQdJ", "Ui", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_uxtw_index">;
def SVPRFW_GATHER_32B_OFFSETS_U : MInst<"svprfw_gather_[{3}]index", "vPQdJ", "Ui", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_uxtw_index">;
def SVPRFD_GATHER_32B_OFFSETS_U : MInst<"svprfd_gather_[{3}]index", "vPQdJ", "Ui", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_uxtw_index">;
def SVPRFB_GATHER_64B_OFFSETS_U : MInst<"svprfb_gather_[{3}]offset", "vPQdJ", "Ul", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_index">;
def SVPRFH_GATHER_64B_OFFSETS_U : MInst<"svprfh_gather_[{3}]index", "vPQdJ", "Ul", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_index">;
def SVPRFW_GATHER_64B_OFFSETS_U : MInst<"svprfw_gather_[{3}]index", "vPQdJ", "Ul", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_index">;
def SVPRFD_GATHER_64B_OFFSETS_U : MInst<"svprfd_gather_[{3}]index", "vPQdJ", "Ul", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_index">;
// Prefetch (Vector bases, scalar offset)
def SVPRFB_GATHER_BASES_OFFSET : MInst<"svprfb_gather[_{2}base]_offset", "vPdlJ", "UiUl", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_scalar_offset">;
def SVPRFH_GATHER_BASES_OFFSET : MInst<"svprfh_gather[_{2}base]_index", "vPdlJ", "UiUl", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_scalar_offset">;
def SVPRFW_GATHER_BASES_OFFSET : MInst<"svprfw_gather[_{2}base]_index", "vPdlJ", "UiUl", [IsGatherPrefetch], MemEltTyInt32, "aarch64_sve_prfw_gather_scalar_offset">;
def SVPRFD_GATHER_BASES_OFFSET : MInst<"svprfd_gather[_{2}base]_index", "vPdlJ", "UiUl", [IsGatherPrefetch], MemEltTyInt64, "aarch64_sve_prfd_gather_scalar_offset">;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// Integer arithmetic // Integer arithmetic
multiclass SInstZPZ<string name, string types, string intrinsic, list<FlagType> flags=[]> { multiclass SInstZPZ<string name, string types, string intrinsic, list<FlagType> flags=[]> {
def _M : SInst<name # "[_{d}]", "ddPd", types, MergeOp1, intrinsic, flags>; def _M : SInst<name # "[_{d}]", "ddPd", types, MergeOp1, intrinsic, flags>;
def _X : SInst<name # "[_{d}]", "dPd", types, MergeAnyExp, intrinsic, flags>; def _X : SInst<name # "[_{d}]", "dPd", types, MergeAnyExp, intrinsic, flags>;
def _Z : SInst<name # "[_{d}]", "dPd", types, MergeZeroExp, intrinsic, flags>; def _Z : SInst<name # "[_{d}]", "dPd", types, MergeZeroExp, intrinsic, flags>;
} }
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clang/lib/CodeGen/CGBuiltin.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 7,708 Lines • ▼ Show 20 Lines unsigned BytesPerElt =
OverloadedTy->getElementType()->getScalarSizeInBits() / 8; OverloadedTy->getElementType()->getScalarSizeInBits() / 8;
Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt); Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt);
Ops[3] = Builder.CreateMul(Ops[3], Scale); Ops[3] = Builder.CreateMul(Ops[3], Scale);
} }
return Builder.CreateCall(F, Ops); return Builder.CreateCall(F, Ops);
} }
Value *CodeGenFunction::EmitSVEGatherPrefetch(SVETypeFlags TypeFlags,
SmallVectorImpl<Value *> &Ops,
unsigned IntID) {
// The gather prefetches are overloaded on the vector input - this can either
// be the vector of base addresses or vector of offsets.
llvm::VectorType *OverloadedTy = dyn_cast<llvm::VectorType>(Ops[1]->getType());
if (!OverloadedTy)
OverloadedTy = cast<llvm::VectorType>(Ops[2]->getType());
// Cast the predicate from svbool_t to the right number of elements.
Ops[0] = EmitSVEPredicateCast(Ops[0], OverloadedTy);
// vector + imm addressing modes
if (Ops[1]->getType()->isVectorTy()) {
if (Ops.size() == 3) {
// Pass 0 for 'vector+imm' when the index is omitted.
Ops.push_back(ConstantInt::get(Int64Ty, 0));
// The sv_prfop is the last operand in the builtin and IR intrinsic.
std::swap(Ops[2], Ops[3]);
}
// Index needs to be passed as scaled offset.
efriedmaUnsubmitted
Not Done
ReplyInline Actions

} else {, so you aren't multiplying by zero?

efriedma: `} else {`, so you aren't multiplying by zero?
sdesmalenAuthorUnsubmitted
Done
ReplyInline Actions

Good catch, I've fixed that before committing.

sdesmalen: Good catch, I've fixed that before committing.
llvm::Type *MemEltTy = SVEBuiltinMemEltTy(TypeFlags);
unsigned BytesPerElt = MemEltTy->getPrimitiveSizeInBits() / 8;
Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt);
Ops[2] = Builder.CreateMul(Ops[2], Scale);
}
Function *F = CGM.getIntrinsic(IntID, OverloadedTy);
return Builder.CreateCall(F, Ops);
}
Value *CodeGenFunction::EmitSVEPrefetchLoad(SVETypeFlags TypeFlags, Value *CodeGenFunction::EmitSVEPrefetchLoad(SVETypeFlags TypeFlags,
SmallVectorImpl<Value *> &Ops, SmallVectorImpl<Value *> &Ops,
unsigned BuiltinID) { unsigned BuiltinID) {
auto *MemEltTy = SVEBuiltinMemEltTy(TypeFlags); auto *MemEltTy = SVEBuiltinMemEltTy(TypeFlags);
auto *VectorTy = getSVEVectorForElementType(MemEltTy); auto *VectorTy = getSVEVectorForElementType(MemEltTy);
auto *MemoryTy = llvm::VectorType::get(MemEltTy, VectorTy->getElementCount()); auto *MemoryTy = llvm::VectorType::get(MemEltTy, VectorTy->getElementCount());
Value *Predicate = EmitSVEPredicateCast(Ops[0], MemoryTy); Value *Predicate = EmitSVEPredicateCast(Ops[0], MemoryTy);
▲ Show 20 Lines • Show All 139 Lines • ▼ Show 20 LinesValue *CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
else if (TypeFlags.isStore()) else if (TypeFlags.isStore())
return EmitSVEMaskedStore(E, Ops, Builtin->LLVMIntrinsic); return EmitSVEMaskedStore(E, Ops, Builtin->LLVMIntrinsic);
else if (TypeFlags.isGatherLoad()) else if (TypeFlags.isGatherLoad())
return EmitSVEGatherLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic); return EmitSVEGatherLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic);
else if (TypeFlags.isScatterStore()) else if (TypeFlags.isScatterStore())
return EmitSVEScatterStore(TypeFlags, Ops, Builtin->LLVMIntrinsic); return EmitSVEScatterStore(TypeFlags, Ops, Builtin->LLVMIntrinsic);
else if (TypeFlags.isPrefetch()) else if (TypeFlags.isPrefetch())
return EmitSVEPrefetchLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic); return EmitSVEPrefetchLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic);
else if (TypeFlags.isGatherPrefetch())
return EmitSVEGatherPrefetch(TypeFlags, Ops, Builtin->LLVMIntrinsic);
else if (Builtin->LLVMIntrinsic != 0) { else if (Builtin->LLVMIntrinsic != 0) {
if (TypeFlags.getMergeType() == SVETypeFlags::MergeZeroExp) if (TypeFlags.getMergeType() == SVETypeFlags::MergeZeroExp)
InsertExplicitZeroOperand(Builder, Ty, Ops); InsertExplicitZeroOperand(Builder, Ty, Ops);
if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp) if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp)
InsertExplicitUndefOperand(Builder, Ty, Ops); InsertExplicitUndefOperand(Builder, Ty, Ops);
if (TypeFlags.isAppendSVALL()) if (TypeFlags.isAppendSVALL())
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clang/lib/CodeGen/CodeGenFunction.h

Show First 20 Lines • Show All 3,924 Lines • ▼ Show 20 Lines llvm::Value *EmitSVEMaskedLoad(const CallExpr *, llvm::Type *ReturnTy,
SmallVectorImpl<llvm::Value *> &Ops, SmallVectorImpl<llvm::Value *> &Ops,
unsigned BuiltinID, bool IsZExtReturn); unsigned BuiltinID, bool IsZExtReturn);
llvm::Value *EmitSVEMaskedStore(const CallExpr *, llvm::Value *EmitSVEMaskedStore(const CallExpr *,
SmallVectorImpl<llvm::Value *> &Ops, SmallVectorImpl<llvm::Value *> &Ops,
unsigned BuiltinID); unsigned BuiltinID);
llvm::Value *EmitSVEPrefetchLoad(SVETypeFlags TypeFlags, llvm::Value *EmitSVEPrefetchLoad(SVETypeFlags TypeFlags,
SmallVectorImpl<llvm::Value *> &Ops, SmallVectorImpl<llvm::Value *> &Ops,
unsigned BuiltinID); unsigned BuiltinID);
llvm::Value *EmitSVEGatherPrefetch(SVETypeFlags TypeFlags,
SmallVectorImpl<llvm::Value *> &Ops,
unsigned IntID);
llvm::Value *EmitAArch64SVEBuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitAArch64SVEBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
llvm::Value *EmitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E, llvm::Value *EmitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
llvm::Triple::ArchType Arch); llvm::Triple::ArchType Arch);
llvm::Value *EmitBPFBuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitBPFBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
llvm::Value *BuildVector(ArrayRef<llvm::Value*> Ops); llvm::Value *BuildVector(ArrayRef<llvm::Value*> Ops);
llvm::Value *EmitX86BuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitX86BuiltinExpr(unsigned BuiltinID, const CallExpr *E);
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clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c

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void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum) void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum)
{ {
// CHECK-LABEL: test_svprfb_vnum // CHECK-LABEL: test_svprfb_vnum
// CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>* // CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
// CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum, i64 0 // CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum, i64 0
// CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %[[GEP]], i32 0) // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %[[GEP]], i32 0)
return svprfb_vnum(pg, base, vnum, SV_PLDL1KEEP); return svprfb_vnum(pg, base, vnum, SV_PLDL1KEEP);
} }
void test_svprfb_gather_u32base(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfb_gather_u32base
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfb_gather_u32base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfb_gather(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfb_gather
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfb_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfb_gather_u64base(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfb_gather_u64base
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfb_gather_u64base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfb_gather_1(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfb_gather_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfb_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfb_gather_s32offset(svbool_t pg, const void *base, svint32_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_s32offset
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_s32offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset(svbool_t pg, const void *base, svint32_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_offset
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_s64offset(svbool_t pg, const void *base, svint64_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_s64offset
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_s64offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset_1(svbool_t pg, const void *base, svint64_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_offset_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_u32offset(svbool_t pg, const void *base, svuint32_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_u32offset
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_u32offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset_2(svbool_t pg, const void *base, svuint32_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_offset_2
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_u64offset(svbool_t pg, const void *base, svuint64_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_u64offset
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_u64offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset_3(svbool_t pg, const void *base, svuint64_t offsets)
{
// CHECK-LABEL: test_svprfb_gather_offset_3
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, base, offsets, SV_PLDL1KEEP);
}
void test_svprfb_gather_u32base_offset(svbool_t pg, svuint32_t bases, int64_t offset)
{
// CHECK-LABEL: test_svprfb_gather_u32base_offset
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset, i32 0)
// CHECK: ret void
return svprfb_gather_u32base_offset(pg, bases, offset, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset_4(svbool_t pg, svuint32_t bases, int64_t offset)
{
// CHECK-LABEL: test_svprfb_gather_offset_4
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, bases, offset, SV_PLDL1KEEP);
}
void test_svprfb_gather_u64base_offset(svbool_t pg, svuint64_t bases, int64_t offset)
{
// CHECK-LABEL: test_svprfb_gather_u64base_offset
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset, i32 0)
// CHECK: ret void
return svprfb_gather_u64base_offset(pg, bases, offset, SV_PLDL1KEEP);
}
void test_svprfb_gather_offset_5(svbool_t pg, svuint64_t bases, int64_t offset)
{
// CHECK-LABEL: test_svprfb_gather_offset_5
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset, i32 0)
// CHECK: ret void
return svprfb_gather_offset(pg, bases, offset, SV_PLDL1KEEP);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Linesvoid test_svprfd_vnum(svbool_t pg, const void *base, int64_t vnum)
// CHECK-LABEL: test_svprfd_vnum // CHECK-LABEL: test_svprfd_vnum
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 2 x i64>* // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 2 x i64>*
// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BASE]], i64 %vnum // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BASE]], i64 %vnum
// CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 2 x i64>* %[[GEP]] to i8* // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 2 x i64>* %[[GEP]] to i8*
// CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0) // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
return svprfd_vnum(pg, base, vnum, SV_PLDL1KEEP); return svprfd_vnum(pg, base, vnum, SV_PLDL1KEEP);
} }
void test_svprfd_gather_u32base(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfd_gather_u32base
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfd_gather_u32base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfd_gather(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfd_gather
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfd_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfd_gather_u64base(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfd_gather_u64base
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfd_gather_u64base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfd_gather_1(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfd_gather_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfd_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfd_gather_s32index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfd_gather_s32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_s32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfd_gather_index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_s64index(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfd_gather_s64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_s64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_index_1(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfd_gather_index_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_u32index(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfd_gather_u32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_u32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_index_2(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfd_gather_index_2
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_u64index(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfd_gather_u64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_u64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_index_3(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfd_gather_index_3
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfd_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfd_gather_u32base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfd_gather_u32base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfd_gather_index_4(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfd_gather_index_4
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfd_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfd_gather_u64base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfd_gather_u64base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfd_gather_index_5(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfd_gather_index_5
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
// CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfd_gather_index(pg, bases, index, SV_PLDL1KEEP);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Linesvoid test_svprfh_vnum(svbool_t pg, const void *base, int64_t vnum)
// CHECK-LABEL: test_svprfh_vnum // CHECK-LABEL: test_svprfh_vnum
// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 8 x i16>* // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 8 x i16>*
// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BASE]], i64 %vnum // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BASE]], i64 %vnum
// CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 8 x i16>* %[[GEP]] to i8* // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 8 x i16>* %[[GEP]] to i8*
// CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0) // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
return svprfh_vnum(pg, base, vnum, SV_PLDL1KEEP); return svprfh_vnum(pg, base, vnum, SV_PLDL1KEEP);
} }
void test_svprfh_gather_u32base(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfh_gather_u32base
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfh_gather_u32base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfh_gather(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfh_gather
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfh_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfh_gather_u64base(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfh_gather_u64base
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfh_gather_u64base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfh_gather_1(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfh_gather_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfh_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfh_gather_s32index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfh_gather_s32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_s32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfh_gather_index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_s64index(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfh_gather_s64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_s64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_index_1(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfh_gather_index_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_u32index(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfh_gather_u32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_u32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_index_2(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfh_gather_index_2
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_u64index(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfh_gather_u64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_u64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_index_3(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfh_gather_index_3
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfh_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfh_gather_u32base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfh_gather_u32base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfh_gather_index_4(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfh_gather_index_4
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfh_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfh_gather_u64base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfh_gather_u64base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfh_gather_index_5(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfh_gather_index_5
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
// CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfh_gather_index(pg, bases, index, SV_PLDL1KEEP);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Linesvoid test_svprfw_vnum(svbool_t pg, const void *base, int64_t vnum)
// CHECK-LABEL: test_svprfw_vnum // CHECK-LABEL: test_svprfw_vnum
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 4 x i32>* // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 4 x i32>*
// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BASE]], i64 %vnum // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BASE]], i64 %vnum
// CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 4 x i32>* %[[GEP]] to i8* // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 4 x i32>* %[[GEP]] to i8*
// CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0) // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
return svprfw_vnum(pg, base, vnum, SV_PLDL1KEEP); return svprfw_vnum(pg, base, vnum, SV_PLDL1KEEP);
} }
void test_svprfw_gather_u32base(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfw_gather_u32base
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfw_gather_u32base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfw_gather(svbool_t pg, svuint32_t bases)
{
// CHECK-LABEL: test_svprfw_gather
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfw_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfw_gather_u64base(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfw_gather_u64base
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfw_gather_u64base(pg, bases, SV_PLDL1KEEP);
}
void test_svprfw_gather_1(svbool_t pg, svuint64_t bases)
{
// CHECK-LABEL: test_svprfw_gather_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0, i32 0)
// CHECK: ret void
return svprfw_gather(pg, bases, SV_PLDL1KEEP);
}
void test_svprfw_gather_s32index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfw_gather_s32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_s32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_index(svbool_t pg, const void *base, svint32_t indices)
{
// CHECK-LABEL: test_svprfw_gather_index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_s64index(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfw_gather_s64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_s64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_index_1(svbool_t pg, const void *base, svint64_t indices)
{
// CHECK-LABEL: test_svprfw_gather_index_1
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_u32index(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfw_gather_u32index
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_u32index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_index_2(svbool_t pg, const void *base, svuint32_t indices)
{
// CHECK-LABEL: test_svprfw_gather_index_2
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_u64index(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfw_gather_u64index
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_u64index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_index_3(svbool_t pg, const void *base, svuint64_t indices)
{
// CHECK-LABEL: test_svprfw_gather_index_3
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %indices, i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, base, indices, SV_PLDL1KEEP);
}
void test_svprfw_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfw_gather_u32base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfw_gather_u32base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfw_gather_index_4(svbool_t pg, svuint32_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfw_gather_index_4
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfw_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfw_gather_u64base_index
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfw_gather_u64base_index(pg, bases, index, SV_PLDL1KEEP);
}
void test_svprfw_gather_index_5(svbool_t pg, svuint64_t bases, int64_t index)
{
// CHECK-LABEL: test_svprfw_gather_index_5
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
// CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]], i32 0)
// CHECK: ret void
return svprfw_gather_index(pg, bases, index, SV_PLDL1KEEP);
}

clang/utils/TableGen/SveEmitter.cpp

Show First 20 Lines • Show All 593 Lines • ▼ Show 20 Lines case 'M':
Float = true; Float = true;
ElementBitwidth = 32; ElementBitwidth = 32;
break; break;
case 'N': case 'N':
Predicate = false; Predicate = false;
Float = true; Float = true;
ElementBitwidth = 64; ElementBitwidth = 64;
break; break;
case 'Q':
Constant = true;
Pointer = true;
Void = true;
NumVectors = 0;
break;
case 'S': case 'S':
Constant = true; Constant = true;
Pointer = true; Pointer = true;
ElementBitwidth = Bitwidth = 8; ElementBitwidth = Bitwidth = 8;
NumVectors = 0; NumVectors = 0;
Signed = true; Signed = true;
break; break;
case 'W': case 'W':
▲ Show 20 Lines • Show All 626 Lines • Show Last 20 Lines