[ARM][MVE] Tail-predication: debug messages if tripcount cannot be found. NFC.

[SjoerdMeijer]

Summary

Finding the loop tripcount is the first crucial step in preparing a loop for tail-predication, and this adds a debug message if a tripcount cannot be found.

And while I was at it, I added some more comments here and there hopefully clarifying things a bit more.

[samparker]

Feel free to make these changes without review.

[SjoerdMeijer]

okidoki, and thanks for looking. Cheers.

llvm/lib/Target/ARM/MVETailPredication.cpp

 //===- MVETailPredication.cpp - MVE Tail Predication ----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
 /// Armv8.1m introduced MVE, M-Profile Vector Extension, and low-overhead
-/// branches to help accelerate DSP applications. These two extensions can be
-/// combined to provide implicit vector predication within a low-overhead loop.
+/// branches to help accelerate DSP applications. These two extensions,
+/// combined with a new form of predication called tail-predication, can be used
+/// to provide implicit vector predication within a low-overhead loop.
+/// This is implicit because the predicate of active/inactive lanes is
+/// calculated by hardware, and thus does not need to be explicitly passed
+/// to vector instructions. The instructions responsible for this are the
+/// DLSTP and WLSTP instructions, which setup a tail-predicated loop and the
+/// the total number of data elements processed by the loop. The loop-end
+/// LETP instruction is responsible for decrementing and setting the remaining
+/// elements to be processed and generating the mask of active lanes.
+///
 /// The HardwareLoops pass inserts intrinsics identifying loops that the
 /// backend will attempt to convert into a low-overhead loop. The vectorizer is
 /// responsible for generating a vectorized loop in which the lanes are
 /// predicated upon the iteration counter. This pass looks at these predicated
 /// vector loops, that are targets for low-overhead loops, and prepares it for
 /// code generation. Once the vectorizer has produced a masked loop, there's a
 /// couple of final forms:
 /// - A tail-predicated loop, with implicit predication.
 /// - A loop containing multiple VCPT instructions, predicating multiple VPT
 ///   blocks of instructions operating on different vector types.
 ///
-/// This pass inserts the inserts the VCTP intrinsic to represent the effect of
-/// tail predication. This will be picked up by the ARM Low-overhead loop pass,
-/// which performs the final transformation to a DLSTP or WLSTP tail-predicated
-/// loop.
+/// This pass:
+/// 1) Pattern matches the scalar iteration count produced by the vectoriser.
+///    The scalar loop iteration count represents the number of elements to be
+///    processed.
+///    TODO: this could be emitted using an intrinsic, similar to the hardware
+///    loop intrinsics, so that we don't need to pattern match this here.
+/// 2) Inserts the VCTP intrinsic to represent the effect of
+///    tail predication. This will be picked up by the ARM Low-overhead loop
+///    pass, which performs the final transformation to a DLSTP or WLSTP
+///    tail-predicated loop.
 
 #include "ARM.h"
 #include "ARMSubtarget.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Analysis/LoopPass.h"
 #include "llvm/Analysis/ScalarEvolution.h"
 #include "llvm/Analysis/ScalarEvolutionExpander.h"
 #include "llvm/Analysis/ScalarEvolutionExpressions.h"

 DisableTailPredication("disable-mve-tail-predication", cl::Hidden,
                        cl::init(true),
                        cl::desc("Disable MVE Tail Predication"));
 namespace {
 
 // Bookkeeping for pattern matching the loop trip count and the number of
 // elements processed by the loop.
 struct TripCountPattern {
-  // The Predicate used by the masked loads/stores, i.e. an icmp instruction
-  // which calculates active/inactive lanes
+  // An icmp instruction that calculates a predicate of active/inactive lanes
+  // used by the masked loads/stores.
   Instruction *Predicate = nullptr;
 
-  // The add instruction that increments the IV
+  // The add instruction that increments the IV.
   Value *TripCount = nullptr;
 
   // The number of elements processed by the vector loop.
   Value *NumElements = nullptr;
 
+  // Other instructions in the icmp chain that calculate the predicate.
   VectorType *VecTy = nullptr;
   Instruction *Shuffle = nullptr;
   Instruction *Induction = nullptr;
 
   TripCountPattern(Instruction *P, Value *TC, VectorType *VT)
       : Predicate(P), TripCount(TC), VecTy(VT){};
 };
 
private:
   /// Return whether this is a vectorized loop, that contains masked
   /// load/stores.
   bool IsPredicatedVectorLoop();
 
   /// Compute a value for the total number of elements that the predicated
   /// loop will process if it is a runtime value.
   bool ComputeRuntimeElements(TripCountPattern &TCP);
 
-  /// Is the icmp that generates an i1 vector, based upon a loop counter
-  /// and a limit that is defined outside the loop.
+  /// Return whether this is the icmp that generates an i1 vector, based
+  /// upon a loop counter and a limit that is defined outside the loop,
+  /// that generates the active/inactive lanes required for tail-predication.
   bool isTailPredicate(TripCountPattern &TCP);
 
   /// Insert the intrinsic to represent the effect of tail predication.
   void InsertVCTPIntrinsic(TripCountPattern &TCP,
                            DenseMap<Instruction *, Instruction *> &NewPredicates);
 
   /// Rematerialize the iteration count in exit blocks, which enables
   /// ARMLowOverheadLoops to better optimise away loop update statements inside
LLVM_DEBUG(dbgs() << "ARM TP: Running on Loop: " << *L << *Setup << "\n"
              << *Decrement << "\n");
 
   if (TryConvert(Setup->getArgOperand(0))) {
     if (ClonedVCTPInExitBlock)
       RematerializeIterCount();
     return true;
   }
 
+  LLVM_DEBUG(dbgs() << "ARM TP: Can't tail-predicate this loop.\n");
   return false;
 }
 
 // Pattern match predicates/masks and determine if they use the loop induction
 // variable to control the number of elements processed by the loop. If so,
 // the loop is a candidate for tail-predication.
 bool MVETailPredication::isTailPredicate(TripCountPattern &TCP) {
   using namespace PatternMatch;
static bool Cleanup(DenseMap<Instruction*, Instruction*> &NewPredicates,
   // Drop references and add operands to check for dead.
   SmallPtrSet<Instruction*, 4> Dead;
   while (!MaybeDead.empty()) {
     auto *I = MaybeDead.front();
     MaybeDead.remove(I);
     if (I->hasNUsesOrMore(1))
       continue;
 
-    for (auto &U : I->operands()) {
+    for (auto &U : I->operands())
       if (auto *OpI = dyn_cast<Instruction>(U))
         MaybeDead.insert(OpI);
-    }
+
     I->dropAllReferences();
     Dead.insert(I);
   }
 
   for (auto *I : Dead) {
     LLVM_DEBUG(dbgs() << "ARM TP: removing dead insn: "; I->dump());
     I->eraseFromParent();
   }
bool MVETailPredication::TryConvert(Value *TripCount) {
 
   LLVM_DEBUG(dbgs() << "ARM TP: Found predicated vector loop.\n");
 
   // Walk through the masked intrinsics and try to find whether the predicate
   // operand is generated from an induction variable.
   SetVector<Instruction*> Predicates;
   DenseMap<Instruction*, Instruction*> NewPredicates;
 
+#ifndef NDEBUG
+  // For debugging purposes, use this to indicate we have been able to
+  // pattern match the scalar loop trip count.
+  bool FoundScalarTC = false;
+#endif
+
   for (auto *I : MaskedInsts) {
     Intrinsic::ID ID = I->getIntrinsicID();
+    // First, find the icmp used by this masked load/store.
     unsigned PredOp = ID == Intrinsic::masked_load ? 2 : 3;
     auto *Predicate = dyn_cast<Instruction>(I->getArgOperand(PredOp));
     if (!Predicate || Predicates.count(Predicate))
       continue;
 
+    // Step 1: using this icmp, now calculate the number of elements
+    // processed by this loop.
     TripCountPattern TCP(Predicate, TripCount, getVectorType(I));
-
     if (!(ComputeConstElements(TCP) || ComputeRuntimeElements(TCP)))
       continue;
 
+    LLVM_DEBUG(FoundScalarTC = true);
+
     if (!isTailPredicate(TCP)) {
-      LLVM_DEBUG(dbgs() << "ARM TP: Not tail predicate: " << *Predicate << "\n");
+      LLVM_DEBUG(dbgs() << "ARM TP: Not an icmp that generates tail predicate: "
+                        << *Predicate << "\n");
       continue;
     }
 
-    LLVM_DEBUG(dbgs() << "ARM TP: Found tail predicate: " << *Predicate << "\n");
+    LLVM_DEBUG(dbgs() << "ARM TP: Found icmp generating tail predicate: "
+                      << *Predicate << "\n");
     Predicates.insert(Predicate);
+
+    // Step 2: emit the VCTP intrinsic representing the effect of TP.
     InsertVCTPIntrinsic(TCP, NewPredicates);
   }
 
-  if (!NewPredicates.size())
+  if (!NewPredicates.size()) {
+      LLVM_DEBUG(if (!FoundScalarTC)
+                   dbgs() << "ARM TP: Can't determine loop itertion count\n");
     return false;
+  }
 
   // Now clean up.
   ClonedVCTPInExitBlock = Cleanup(NewPredicates, Predicates, L);
   return true;
 }
 
 Pass *llvm::createMVETailPredicationPass() {
   return new MVETailPredication();
 }
 
 char MVETailPredication::ID = 0;
 
 INITIALIZE_PASS_BEGIN(MVETailPredication, DEBUG_TYPE, DESC, false, false)
 INITIALIZE_PASS_END(MVETailPredication, DEBUG_TYPE, DESC, false, false)