[CallSite Removal][CodeGenPrepare] permit optimizations for CallBrInst

[nickdesaulniers]

Summary

Craig noticed that some of the optimizations here for inline assembly
are handled for CallInsts but not CallBrInsts.

Since CallInst and CallBrInst now share the same base CallBase class,
use that instead. This unlocks these optimizations for CallBrInst.

[nickdesaulniers]

WIP: I'd like to clean up TLI and FortifiedLibCallSimplifier first, which will simplify this patch. Posting it early for review.

[craig.topper]

llvm/lib/CodeGen/CodeGenPrepare.cpp

1892–1904

Why is this CallInst?

[nickdesaulniers]

llvm/lib/CodeGen/CodeGenPrepare.cpp

1892–1904

The call below to TLI->ExpandInlineAsm(CI) requires a CallInst.

The added dyn_cast<CallInst> in the patch are what I want to remove. That will require fixing up similar interface issues in FortifiedLibCallSimplifier and TargetLoweringInfo.

Should I shave those yaks in this one change, or submit this first separately, then rebase+revist this one? (Then I can drop my added dyn_cast).

[nickdesaulniers]

llvm/lib/CodeGen/CodeGenPrepare.cpp

1892–1904

s/or submit this/or submit those/

[nickdesaulniers]

• fixup shouldAlignPointerArgs, drop related dyn_cast

llvm/include/llvm/CodeGen/TargetLowering.h

public:
 
   /// Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g. we
   /// are happy to sink it into basic blocks. A cast may be free, but not
   /// necessarily a no-op. e.g. a free truncate from a 64-bit to 32-bit pointer.
   virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const {
     return isNoopAddrSpaceCast(SrcAS, DestAS);
   }
 
-  /// Return true if the pointer arguments to CI should be aligned by aligning
+  /// Return true if the pointer arguments to CB should be aligned by aligning
   /// the object whose address is being passed. If so then MinSize is set to the
   /// minimum size the object must be to be aligned and PrefAlign is set to the
   /// preferred alignment.
-  virtual bool shouldAlignPointerArgs(CallInst * /*CI*/, unsigned & /*MinSize*/,
+  virtual bool shouldAlignPointerArgs(CallBase * /*CB*/, unsigned & /*MinSize*/,
                                       unsigned & /*PrefAlign*/) const {
     return false;
   }
 
   //===--------------------------------------------------------------------===//
   /// \name Helpers for TargetTransformInfo implementations
   /// @{
 

llvm/lib/CodeGen/CodeGenPrepare.cpp

private:
     bool canMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
     void eliminateMostlyEmptyBlock(BasicBlock *BB);
     bool isMergingEmptyBlockProfitable(BasicBlock *BB, BasicBlock *DestBB,
                                        bool isPreheader);
     bool optimizeBlock(BasicBlock &BB, bool &ModifiedDT);
     bool optimizeInst(Instruction *I, bool &ModifiedDT);
     bool optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
                             Type *AccessTy, unsigned AddrSpace);
-    bool optimizeInlineAsmInst(CallInst *CS);
-    bool optimizeCallInst(CallInst *CI, bool &ModifiedDT);
+    bool optimizeInlineAsmInst(CallBase *CB);
+    bool optimizeCallBase(CallBase *CB, bool &ModifiedDT);
     bool optimizeExt(Instruction *&I);
     bool optimizeExtUses(Instruction *I);
     bool optimizeLoadExt(LoadInst *Load);
     bool optimizeShiftInst(BinaryOperator *BO);
     bool optimizeSelectInst(SelectInst *SI);
     bool optimizeShuffleVectorInst(ShuffleVectorInst *SVI);
     bool optimizeSwitchInst(SwitchInst *SI);
     bool optimizeExtractElementInst(Instruction *Inst);
static bool despeculateCountZeros(IntrinsicInst *CountZeros,
   // We are explicitly handling the zero case, so we can set the intrinsic's
   // undefined zero argument to 'true'. This will also prevent reprocessing the
   // intrinsic; we only despeculate when a zero input is defined.
   CountZeros->setArgOperand(1, Builder.getTrue());
   ModifiedDT = true;
   return true;
 }
 
-bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool &ModifiedDT) {
-  BasicBlock *BB = CI->getParent();
+bool CodeGenPrepare::optimizeCallBase(CallBase *CB, bool &ModifiedDT) {
+  BasicBlock *BB = CB->getParent();
 
   // Lower inline assembly if we can.
   // If we found an inline asm expession, and if the target knows how to
   // lower it to normal LLVM code, do so now.
+  if (auto *CI = dyn_cast<CallInst>(CB))
     if (isa<InlineAsm>(CI->getCalledValue())) {
       if (TLI->ExpandInlineAsm(CI)) {
         // Avoid invalidating the iterator.
         CurInstIterator = BB->begin();
         // Avoid processing instructions out of order, which could cause
         // reuse before a value is defined.
         SunkAddrs.clear();
         return true;
       }
       // Sink address computing for memory operands into the block.
       if (optimizeInlineAsmInst(CI))
         return true;
     }
 
   // Align the pointer arguments to this call if the target thinks it's a good
   // idea
   unsigned MinSize, PrefAlign;
-  if (TLI->shouldAlignPointerArgs(CI, MinSize, PrefAlign)) {
-    for (auto &Arg : CI->arg_operands()) {
+  if (TLI->shouldAlignPointerArgs(CB, MinSize, PrefAlign)) {
+    for (auto &Arg : CB->arg_operands()) {
       // We want to align both objects whose address is used directly and
       // objects whose address is used in casts and GEPs, though it only makes
-      // sense for GEPs if the offset is a multiple of the desired alignment and
-      // if size - offset meets the size threshold.
+      // sense for GEPs if the offset is a multiple of the desired alignment
+      // and if size - offset meets the size threshold.
       if (!Arg->getType()->isPointerTy())
         continue;
       APInt Offset(DL->getIndexSizeInBits(
                        cast<PointerType>(Arg->getType())->getAddressSpace()),
                    0);
       Value *Val = Arg->stripAndAccumulateInBoundsConstantOffsets(*DL, Offset);
       uint64_t Offset2 = Offset.getLimitedValue();
-      if ((Offset2 & (PrefAlign-1)) != 0)
+      if ((Offset2 & (PrefAlign - 1)) != 0)
         continue;
       AllocaInst *AI;
       if ((AI = dyn_cast<AllocaInst>(Val)) && AI->getAlignment() < PrefAlign &&
           DL->getTypeAllocSize(AI->getAllocatedType()) >= MinSize + Offset2)
         AI->setAlignment(MaybeAlign(PrefAlign));
       // Global variables can only be aligned if they are defined in this
       // object (i.e. they are uniquely initialized in this object), and
       // over-aligning global variables that have an explicit section is
       // forbidden.
       GlobalVariable *GV;
       if ((GV = dyn_cast<GlobalVariable>(Val)) && GV->canIncreaseAlignment() &&
           GV->getPointerAlignment(*DL) < PrefAlign &&
-          DL->getTypeAllocSize(GV->getValueType()) >=
-              MinSize + Offset2)
+          DL->getTypeAllocSize(GV->getValueType()) >= MinSize + Offset2)
         GV->setAlignment(MaybeAlign(PrefAlign));
     }
     // If this is a memcpy (or similar) then we may be able to improve the
     // alignment
-    if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(CI)) {
+    if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(CB)) {
       unsigned DestAlign = getKnownAlignment(MI->getDest(), *DL);
       if (DestAlign > MI->getDestAlignment())
         MI->setDestAlignment(DestAlign);
       if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI)) {
         unsigned SrcAlign = getKnownAlignment(MTI->getSource(), *DL);
         if (SrcAlign > MTI->getSourceAlignment())
           MTI->setSourceAlignment(SrcAlign);
       }
     }
   }
 
   // If we have a cold call site, try to sink addressing computation into the
   // cold block.  This interacts with our handling for loads and stores to
   // ensure that we can fold all uses of a potential addressing computation
   // into their uses.  TODO: generalize this to work over profiling data
-  if (CI->hasFnAttr(Attribute::Cold) &&
-      !OptSize && !llvm::shouldOptimizeForSize(BB, PSI, BFI.get()))
-    for (auto &Arg : CI->arg_operands()) {
+  if (CB->hasFnAttr(Attribute::Cold) && !OptSize &&
+      !llvm::shouldOptimizeForSize(BB, PSI, BFI.get()))
+    for (auto &Arg : CB->arg_operands()) {
       if (!Arg->getType()->isPointerTy())
         continue;
       unsigned AS = Arg->getType()->getPointerAddressSpace();
-      return optimizeMemoryInst(CI, Arg, Arg->getType(), AS);
+      return optimizeMemoryInst(CB, Arg, Arg->getType(), AS);
     }
 
-  IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI);
+  auto *II = dyn_cast<IntrinsicInst>(CB);
   if (II) {
     switch (II->getIntrinsicID()) {
     default: break;
     case Intrinsic::assume: {
       II->eraseFromParent();
       return true;
     }
 
     case Intrinsic::experimental_widenable_condition: {
       // Give up on future widening oppurtunties so that we can fold away dead
       // paths and merge blocks before going into block-local instruction
       // selection.
       if (II->use_empty()) {
         II->eraseFromParent();
         return true;
       }
       Constant *RetVal = ConstantInt::getTrue(II->getContext());
       resetIteratorIfInvalidatedWhileCalling(BB, [&]() {
-        replaceAndRecursivelySimplify(CI, RetVal, TLInfo, nullptr);
+        replaceAndRecursivelySimplify(CB, RetVal, TLInfo, nullptr);
       });
       return true;
     }
     case Intrinsic::objectsize:
       llvm_unreachable("llvm.objectsize.* should have been lowered already");
     case Intrinsic::is_constant:
       llvm_unreachable("llvm.is.constant.* should have been lowered already");
     case Intrinsic::aarch64_stlxr:
     case Intrinsic::aarch64_stxr: {
-      ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0));
+      ZExtInst *ExtVal = dyn_cast<ZExtInst>(CB->getArgOperand(0));
       if (!ExtVal || !ExtVal->hasOneUse() ||
-          ExtVal->getParent() == CI->getParent())
+          ExtVal->getParent() == CB->getParent())
         return false;
       // Sink a zext feeding stlxr/stxr before it, so it can be folded into it.
-      ExtVal->moveBefore(CI);
+      ExtVal->moveBefore(CB);
       // Mark this instruction as "inserted by CGP", so that other
       // optimizations don't touch it.
       InsertedInsts.insert(ExtVal);
       return true;
     }
 
     case Intrinsic::launder_invariant_group:
     case Intrinsic::strip_invariant_group: {
if (TLI->getAddrModeArguments(II, PtrOps, AccessTy))
         Value *PtrVal = PtrOps.pop_back_val();
         unsigned AS = PtrVal->getType()->getPointerAddressSpace();
         if (optimizeMemoryInst(II, PtrVal, AccessTy, AS))
           return true;
       }
   }
 
   // From here on out we're working with named functions.
-  if (!CI->getCalledFunction()) return false;
+  if (!CB->getCalledFunction())
+    return false;
 
   // Lower all default uses of _chk calls.  This is very similar
   // to what InstCombineCalls does, but here we are only lowering calls
   // to fortified library functions (e.g. __memcpy_chk) that have the default
   // "don't know" as the objectsize.  Anything else should be left alone.
+  if (auto *CI = dyn_cast<CallInst>(CB)) {
     FortifiedLibCallSimplifier Simplifier(TLInfo, true);
-  IRBuilder<> Builder(CI);
+    IRBuilder<> Builder(CB);
     if (Value *V = Simplifier.optimizeCall(CI, Builder)) {
       CI->replaceAllUsesWith(V);
       CI->eraseFromParent();
       return true;
     }
+  }
 
   return false;
 }
 
 /// Look for opportunities to duplicate return instructions to the predecessor
 /// to enable tail call optimizations. The case it is currently looking for is:
 /// @code
 /// bb0:
bool AddressingModeMatcher::matchAddr(Value *Addr, unsigned Depth) {
   }
   // Couldn't match.
   TPT.rollback(LastKnownGood);
   return false;
 }
 
 /// Check to see if all uses of OpVal by the specified inline asm call are due
 /// to memory operands. If so, return true, otherwise return false.
-static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
+static bool IsOperandAMemoryOperand(CallBase *CB, InlineAsm *IA, Value *OpVal,
                                     const TargetLowering &TLI,
                                     const TargetRegisterInfo &TRI) {
-  const Function *F = CI->getFunction();
-  TargetLowering::AsmOperandInfoVector TargetConstraints =
-      TLI.ParseConstraints(F->getParent()->getDataLayout(), &TRI,
-                            ImmutableCallSite(CI));
+  const Function *F = CB->getFunction();
+  TargetLowering::AsmOperandInfoVector TargetConstraints = TLI.ParseConstraints(
+      F->getParent()->getDataLayout(), &TRI, ImmutableCallSite(CB));
 
   for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
     TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
 
     // Compute the constraint code and ConstraintType to use.
     TLI.ComputeConstraintToUse(OpInfo, SDValue());
 
     // If this asm operand is our Value*, and if it isn't an indirect memory
for (Use &U : I->uses()) {
     if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(UserI)) {
       unsigned opNo = U.getOperandNo();
       if (opNo != AtomicCmpXchgInst::getPointerOperandIndex())
         return true; // Storing addr, not into addr.
       MemoryUses.push_back(std::make_pair(CmpX, opNo));
       continue;
     }
 
-    if (CallInst *CI = dyn_cast<CallInst>(UserI)) {
-      if (CI->hasFnAttr(Attribute::Cold)) {
+    if (CallBase *CB = dyn_cast<CallBase>(UserI)) {
+      if (CB->hasFnAttr(Attribute::Cold)) {
         // If this is a cold call, we can sink the addressing calculation into
-        // the cold path.  See optimizeCallInst
-        bool OptForSize = OptSize ||
-          llvm::shouldOptimizeForSize(CI->getParent(), PSI, BFI);
-        if (!OptForSize)
+        // the cold path.  See optimizeCallBase.
+        if (!(OptSize || shouldOptimizeForSize(CB->getParent(), PSI, BFI)))
           continue;
       }
 
-      InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
+      InlineAsm *IA = dyn_cast<InlineAsm>(CB->getCalledValue());
       if (!IA) return true;
 
       // If this is a memory operand, we're cool, otherwise bail out.
-      if (!IsOperandAMemoryOperand(CI, IA, I, TLI, TRI))
+      if (!IsOperandAMemoryOperand(CB, IA, I, TLI, TRI))
         return true;
       continue;
     }
 
     if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI, OptSize,
                           PSI, BFI, SeenInsts))
       return true;
   }
if (Repl->use_empty()) {
     }
   }
   ++NumMemoryInsts;
   return true;
 }
 
 /// If there are any memory operands, use OptimizeMemoryInst to sink their
 /// address computing into the block when possible / profitable.
-bool CodeGenPrepare::optimizeInlineAsmInst(CallInst *CS) {
+bool CodeGenPrepare::optimizeInlineAsmInst(CallBase *CB) {
   bool MadeChange = false;
 
   const TargetRegisterInfo *TRI =
-      TM->getSubtargetImpl(*CS->getFunction())->getRegisterInfo();
+      TM->getSubtargetImpl(*CB->getFunction())->getRegisterInfo();
   TargetLowering::AsmOperandInfoVector TargetConstraints =
-      TLI->ParseConstraints(*DL, TRI, CS);
+      TLI->ParseConstraints(*DL, TRI, ImmutableCallSite(CB));
   unsigned ArgNo = 0;
   for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
     TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
 
     // Compute the constraint code and ConstraintType to use.
     TLI->ComputeConstraintToUse(OpInfo, SDValue());
 
     if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
         OpInfo.isIndirect) {
-      Value *OpVal = CS->getArgOperand(ArgNo++);
-      MadeChange |= optimizeMemoryInst(CS, OpVal, OpVal->getType(), ~0u);
+      Value *OpVal = CB->getArgOperand(ArgNo++);
+      MadeChange |= optimizeMemoryInst(CB, OpVal, OpVal->getType(), ~0u);
     } else if (OpInfo.Type == InlineAsm::isInput)
       ArgNo++;
   }
 
   return MadeChange;
 }
 
 /// Check if all the uses of \p Val are equivalent (or free) zero or
if (tryToSinkFreeOperands(I))
     return true;
 
   switch (I->getOpcode()) {
   case Instruction::Shl:
   case Instruction::LShr:
   case Instruction::AShr:
     return optimizeShiftInst(cast<BinaryOperator>(I));
   case Instruction::Call:
-    return optimizeCallInst(cast<CallInst>(I), ModifiedDT);
+  case Instruction::CallBr:
+    return optimizeCallBase(cast<CallBase>(I), ModifiedDT);
   case Instruction::Select:
     return optimizeSelectInst(cast<SelectInst>(I));
   case Instruction::ShuffleVector:
     return optimizeShuffleVectorInst(cast<ShuffleVectorInst>(I));
   case Instruction::Switch:
     return optimizeSwitchInst(cast<SwitchInst>(I));
   case Instruction::ExtractElement:
     return optimizeExtractElementInst(cast<ExtractElementInst>(I));

llvm/lib/Target/ARM/ARMISelLowering.h

public:
     getRegClassFor(MVT VT, bool isDivergent = false) const override;
 
     /// Returns true if a cast between SrcAS and DestAS is a noop.
     bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
       // Addrspacecasts are always noops.
       return true;
     }
 
-    bool shouldAlignPointerArgs(CallInst *CI, unsigned &MinSize,
+    bool shouldAlignPointerArgs(CallBase *CB, unsigned &MinSize,
                                 unsigned &PrefAlign) const override;
 
     /// createFastISel - This method returns a target specific FastISel object,
     /// or null if the target does not support "fast" ISel.
     FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
                              const TargetLibraryInfo *libInfo) const override;
 
     Sched::Preference getSchedulingPreference(SDNode *N) const override;

llvm/lib/Target/ARM/ARMISelLowering.cpp

if (VT == MVT::v8i64)
       return &ARM::QQQQPRRegClass;
   }
   return TargetLowering::getRegClassFor(VT);
 }
 
 // memcpy, and other memory intrinsics, typically tries to use LDM/STM if the
 // source/dest is aligned and the copy size is large enough. We therefore want
 // to align such objects passed to memory intrinsics.
-bool ARMTargetLowering::shouldAlignPointerArgs(CallInst *CI, unsigned &MinSize,
+bool ARMTargetLowering::shouldAlignPointerArgs(CallBase *CB, unsigned &MinSize,
                                                unsigned &PrefAlign) const {
-  if (!isa<MemIntrinsic>(CI))
+  if (!isa<MemIntrinsic>(CB))
     return false;
   MinSize = 8;
   // On ARM11 onwards (excluding M class) 8-byte aligned LDM is typically 1
   // cycle faster than 4-byte aligned LDM.
   PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4);
   return true;
 }