Allow single-bit integer types to have signs. A signed one bit integer is either 0 or -1.

[rriddle]

mlir/test/IR/attribute.mlir

84

nit: 1 : ui1

to match the output

[lattner]

mlir/test/IR/attribute.mlir

84

Sorry I didn't see this comment (still relatively new to phabricator). I'll push a follow up commit with this tweak. Thank you for the review!

mlir/lib/IR/AsmPrinter.cpp

void ModulePrinter::printAttribute(Attribute attr,
   case StandardAttributes::Dictionary:
     os << '{';
     interleaveComma(attr.cast<DictionaryAttr>().getValue(),
                     [&](NamedAttribute attr) { printNamedAttribute(attr); });
     os << '}';
     break;
   case StandardAttributes::Integer: {
     auto intAttr = attr.cast<IntegerAttr>();
-    // Print all signed/signless integer attributes as signed unless i1.
-    bool isSigned =
-        attrType.isIndex() || (!attrType.isUnsignedInteger() &&
-                               attrType.getIntOrFloatBitWidth() != 1);
-    intAttr.getValue().print(os, isSigned);
+    // Only print attributes as unsigned if they are explicitly unsigned or are
+    // signless 1-bit values.  Indexes, signed values, and multi-bit signless
+    // values print as signed.
+    bool isUnsigned =
+        attrType.isUnsignedInteger() || attrType.isSignlessInteger(1);
+    intAttr.getValue().print(os, !isUnsigned);
 
     // IntegerAttr elides the type if I64.
     if (typeElision == AttrTypeElision::May && attrType.isSignlessInteger(64))
       return;
     break;
   }
   case StandardAttributes::Float: {
     auto floatAttr = attr.cast<FloatAttr>();

mlir/lib/IR/StandardTypes.cpp

 /// Verify the construction of an integer type.
 LogicalResult
 IntegerType::verifyConstructionInvariants(Location loc, unsigned width,
                                           SignednessSemantics signedness) {
   if (width > IntegerType::kMaxWidth) {
     return emitError(loc) << "integer bitwidth is limited to "
                           << IntegerType::kMaxWidth << " bits";
   }
-  if (width == 1 && signedness != IntegerType::Signless)
-    return emitOptionalError(loc, "cannot have signedness semantics for i1");
   return success();
 }
 
 unsigned IntegerType::getWidth() const { return getImpl()->getWidth(); }
 
 IntegerType::SignednessSemantics IntegerType::getSignedness() const {
   return getImpl()->getSignedness();
 }

mlir/test/IR/attribute.mlir

"test.in_range_attrs"() {
     attr_15 = -9223372036854775808 : i64,
     // CHECK-SAME: attr_16 = 9223372036854775807 : i64
     attr_16 = 9223372036854775807 : i64,
     // CHECK-SAME: attr_17 = -9223372036854775808 : si64
     attr_17 = -9223372036854775808 : si64,
     // CHECK-SAME: attr_18 = 9223372036854775807 : si64
     attr_18 = 9223372036854775807 : si64,
     // CHECK-SAME: attr_19 = 18446744073709551615 : ui64
-    attr_19 = 18446744073709551615 : ui64
+    attr_19 = 18446744073709551615 : ui64,
+    // CHECK-SAME: attr_20 = 1 : ui1
+    attr_20 = 1: ui1,
+    // CHECK-SAME: attr_21 = -1 : si1
+    attr_21 = -1: si1
+
   } : () -> ()
 
   return
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//

mlir/test/IR/invalid.mlir

 }
 
 // -----
 
 func @illegaltype(i0) // expected-error {{invalid integer width}}
 
 // -----
 
-func @illegaltype(ui1) // expected-error {{cannot have signedness semantics for i1}}
-
-// -----
-
-func @illegaltype(si1) // expected-error {{cannot have signedness semantics for i1}}
-
-// -----
-
 func @malformed_for_percent() {
   affine.for i = 1 to 10 { // expected-error {{expected SSA operand}}
 
 // -----
 
 func @malformed_for_equal() {
   affine.for %i 1 to 10 { // expected-error {{expected '='}}