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PowerPCSPE: Stop libunwind from complaining about SPE registers
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Authored by jhibbits on Apr 3 2020, 2:42 PM.

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Summary
  • Match SPE "DWARF" register numbers to GCC's instead of official DWARF documentation.
  • Increase the register count to 148 from 112, even though the upper registers aren't saved (yet).

Diff Detail

Unit TestsFailed

Event Timeline

jhibbits created this revision.Apr 3 2020, 2:42 PM
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Im surprised that no tests need changing here. Could you please add a clang/llvm test to validate that the generated information matches what libunwind will start looking for?

Im surprised that no tests need changing here. Could you please add a clang/llvm test to validate that the generated information matches what libunwind will start looking for?

I'm looking for any existing tests for PowerPC that might do this for the GPRs and FPRs, but don't see any. Do you know of any tests already? Or tests for other archs I can model one on?

MaskRay added a subscriber: MaskRay.Apr 3 2020, 9:55 PM

Im surprised that no tests need changing here. Could you please add a clang/llvm test to validate that the generated information matches what libunwind will start looking for?

libunwind is really, really, poorly tested:(

The tests that I was requesting were for clang/LLVM. Testing libunwind is challenging as it requires runtime tests, and that means that in order to test it effectively, you need each type of machine. I suppose that in theory, you could build a VM based on LLVM's JIT, cross-compile the library, binary translate the code and test it - but that seems incredibly fragile.

jhibbits abandoned this revision.Dec 12 2020, 8:41 AM

Turns out GCC generates 1200-range register values. This still needs work to avoid the error, but it means giving libunwind special knowledge of the SPE register set.