[GlobalISel][AArch64] Early select stores which have G_IMPLICIT_DEF as the value

[paquette]

Summary

These can just be deleted, since they're just stores of undefined values.

This is equivalent to what the DAGCombiner does. It's better to do this later than earlier to make sure we handle any implicit defs introduced during legalization.

[aemerson]

This could go into a post-legalizer combiner. Maybe we should add one and run it at optimization modes?

[paquette]

I think that's a good idea for this sort of thing.

We could also move all of the other G_IMPLICIT_DEF-related combines there, since they're more likely to catch things there.

[paquette]

Post-legalizer combiner + equivalent transform: D78852

llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp

if (Ty.getSizeInBits() == 64) {
       I.getOperand(1).ChangeToRegister(AArch64::WZR, false);
       RBI.constrainGenericRegister(DefReg, AArch64::GPR32RegClass, MRI);
     } else
       return false;
 
     I.setDesc(TII.get(TargetOpcode::COPY));
     return true;
   }
+  case TargetOpcode::G_STORE: {
+    Register Val = I.getOperand(0).getReg();
+    MachineInstr *ImpDef = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Val, MRI);
+    if (!ImpDef)
+      return false;
+    I.eraseFromParent();
+    return true;
+  }
   default:
     return false;
   }
 }
 
 bool AArch64InstructionSelector::select(MachineInstr &I) {
   assert(I.getParent() && "Instruction should be in a basic block!");
   assert(I.getParent()->getParent() && "Instruction should be in a function!");

llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir

--- |
   define void @store_v2s32(i64 *%addr) { ret void }
   define void @store_v2s64(i64 *%addr) { ret void }
 
   define void @store_4xi16(<4 x i16> %v, <4 x i16>* %ptr) { ret void }
   define void @store_4xi32(<4 x i32> %v, <4 x i32>* %ptr) { ret void }
   define void @store_8xi16(<8 x i16> %v, <8 x i16>* %ptr) { ret void }
   define void @store_16xi8(<16 x i8> %v, <16 x i8>* %ptr) { ret void }
 
+  define void @imp_def() { ret void }
 ...
 
 ---
 name:            store_s64_gpr
 legalized:       true
 regBankSelected: true
 
 registers:
bb.1 (%ir-block.0):
     ; CHECK: STRQui [[COPY]], [[COPY1]], 0 :: (store 16 into %ir.ptr)
     ; CHECK: RET_ReallyLR
     %0:fpr(<16 x s8>) = COPY $q0
     %1:gpr(p0) = COPY $x0
     G_STORE %0(<16 x s8>), %1(p0) :: (store 16 into %ir.ptr)
     RET_ReallyLR
 
 ...
+
+---
+name:            imp_def
+legalized:       true
+regBankSelected: true
+body:             |
+  bb.0:
+    liveins: $x0, $x1
+    ; Test updater will only ever add one checkline, which will vacuously pass
+    ; since it's just the return. We need to explicitly check that there's no
+    ; store here.
+    ; CHECK-LABEL: name: imp_def
+    ; CHECK-NOT: STR
+    ; CHECK: RET_ReallyLR
+    %0:gpr(p0) = COPY $x0
+    %1:gpr(s64) = G_IMPLICIT_DEF
+    G_STORE  %1, %0 :: (store 8)
+    RET_ReallyLR
+
+...