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Differential D77200

[LLD][ELF][ARM] use reloc directive for Thumb assembler tests
ClosedPublic

Authored by psmith on Apr 1 2020, 1:40 AM.

Details

Reviewers
MaskRay
ruiu
grimar
• espindola
Commits
rGda74537e870d: [LLD][ELF][ARM] use .reloc directive for Thumb assembler tests
Summary

In the near future llvm-mc will resolve the fixups that generate R_ARM_THUMB_PC8 and R_ARM_THUMB_PC12 at assembly time (see comments in D72892), and forbid inter-section references. Change the LLD tests for these relocations to use .inst and .reloc to avoid LLD tests failing when this happens. The tests generate the same instructions, relocations and symbols.

I will need to make equivalent changes for D75349 Arm equivalent relocations, but this is still in review so these don't need changing before llvm-mc.

As the adr and ldr instructions have fixups with special cases for irregular addends, attempts at manipulating the instructions to create the initial addends I needed failed. It was simpler to use .inst to encode the bit-pattern I needed without any relocations.

I noticed that .reloc wasn't behaving well when an Alignment or Padding fragment had been inserted. I've replaced the few inline .balign directives with nops in this case. Will need to look into MC and raise a PR if there is a problem.

Diff Detail

Event Timeline

psmith created this revision.Apr 1 2020, 1:40 AM
Herald added a reviewer: • espindola. · View Herald TranscriptApr 1 2020, 1:40 AM
Herald added subscribers: danielkiss, kristof.beyls, emaste. · View Herald Transcript
psmith mentioned this in D76575: [LLD][ELF][ARM] Replace assembler files with yaml.Apr 1 2020, 1:41 AM
MaskRay accepted this revision.Apr 1 2020, 8:25 AM

LGTM.

use reloc directive for Thumb assembler tests

Maybe reloc -> .reloc

I noticed that .reloc wasn't behaving well when an Alignment or Padding fragment had been inserted. I've replaced the few inline .balign directives with nops in this case. Will need to look into MC and raise a PR if there is a problem.

I can't find where nops are used...

This revision is now accepted and ready to land.Apr 1 2020, 8:25 AM
Closed by commit rGda74537e870d: [LLD][ELF][ARM] use .reloc directive for Thumb assembler tests (authored by psmith). · Explain WhyApr 3 2020, 4:16 AM
This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptApr 3 2020, 4:16 AM

Revision Contents

Diff 254749

lld/test/ELF/arm-thumb-adr-err.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits .section .text.0, "ax", %progbits
.balign 4 .balign 4
.thumb_func .thumb_func
low: low:
bx lr bx lr
.section .text.1, "ax", %progbits .section .text.1, "ax", %progbits
.balign 2 .balign 2
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
adr r0, low /// adr r0, low
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes .inst.n 0xa0ff
adr r1, unaligned .reloc 0, R_ARM_THM_PC8, low
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
adr r2, range /// adr r1, unaligned
.inst.n 0xa1ff
.reloc 2, R_ARM_THM_PC8, unaligned
// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
/// adr r2, range
.inst.n 0xa2ff
.reloc 4, R_ARM_THM_PC8, range
.section .text.2, "ax", %progbits .section .text.2, "ax", %progbits
.balign 4 .balign 4
nop nop
.thumb_func .thumb_func
unaligned: unaligned:
bx lr bx lr
.space 1020 .space 1020
range: range:
bx lr bx lr

lld/test/ELF/arm-thumb-adr.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: ld.lld %t.o -o %t // RUN: ld.lld %t.o -o %t
// RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s // RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s
/// Test R_ARM_THM_PC8 as used in the adr pseudo instruction. Only positive /// Test R_ARM_THM_PC8 as used in the adr pseudo instruction. Only positive
/// 4-byte aligned offsets are permitted. /// 4-byte aligned offsets are permitted.
.section .text.01, "ax", %progbits .section .text.01, "ax", %progbits
.balign 4 .balign 4
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
adr r0, target1 /// adr r0, target1
adr r1, target2 .inst.n 0xa0ff
.reloc 0, R_ARM_THM_PC8, target1
/// adr r1, target2
.inst.n 0xa1ff
.reloc 2, R_ARM_THM_PC8, target2
.section .text.02, "ax", %progbits .section .text.02, "ax", %progbits
.balign 4 .balign 4
.global target1 .global target1
.type target1, %function .type target1, %function
target1: target1:
nop nop
bx lr bx lr
.section .text.03, "ax", %progbits .section .text.03, "ax", %progbits
Show All 18 Lines

lld/test/ELF/arm-thumb-ldrlit-err.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits .section .text.0, "ax", %progbits
.balign 4 .balign 4
.thumb_func .thumb_func
low: low:
bx lr bx lr
.section .text.1, "ax", %progbits .section .text.1, "ax", %progbits
.balign 2 .balign 2
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
ldr r0, low /// ldr r0, low
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes .inst.n 0x48ff
ldr r1, unaligned .reloc 0, R_ARM_THM_PC8, low
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
ldr r2, range /// ldr r1, unaligned
.inst.n 0x49ff
.reloc 2, R_ARM_THM_PC8, unaligned
// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
/// ldr r2, range
.inst.n 0x4aff
.reloc 4, R_ARM_THM_PC8, range
.section .text.2, "ax", %progbits .section .text.2, "ax", %progbits
.balign 4 .balign 4
nop nop
.thumb_func .thumb_func
unaligned: unaligned:
bx lr bx lr
.space 1020 .space 1020
range: range:
bx lr bx lr

lld/test/ELF/arm-thumb-ldrlit.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: ld.lld %t.o -o %t // RUN: ld.lld %t.o -o %t
// RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s // RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s
/// Test R_ARM_THM_PC8 as used in the ldr pseudo instruction. Only positive /// Test R_ARM_THM_PC8 as used in the ldr pseudo instruction. Only positive
/// 4-byte aligned offsets are permitted. /// 4-byte aligned offsets are permitted.
.section .text.01, "ax", %progbits .section .text.01, "ax", %progbits
.balign 4 .balign 4
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
ldr r0, target1 /// ldr r0, target1
ldr r1, target2 .inst.n 0x48ff
.reloc 0, R_ARM_THM_PC8, target1
/// ldr r1, target2
.inst.n 0x49ff
.reloc 2, R_ARM_THM_PC8, target2
.section .text.02, "ax", %progbits .section .text.02, "ax", %progbits
.balign 4 .balign 4
.global target1 .global target1
.type target1, %function .type target1, %function
target1: target1:
nop nop
bx lr bx lr
.section .text.03, "ax", %progbits .section .text.03, "ax", %progbits
Show All 18 Lines

lld/test/ELF/arm-thumb2-adr-err.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits .section .text.0, "ax", %progbits
.thumb_func .thumb_func
.balign 4 .balign 4
low: low:
bx lr bx lr
nop nop
nop nop
.section .text.1, "ax", %progbits .section .text.1, "ax", %progbits
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095]
adr.w r0, low - 4091 /// adr.w r0, low - 4091
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095] .inst.w 0xf6af70ff
adr.w r0, high + 4091 .reloc 0, R_ARM_THM_ALU_PREL_11_0, low
// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095]
/// adr.w r0, high + 4091
.inst.w 0xf60f70f7
.reloc 4, R_ARM_THM_ALU_PREL_11_0, high
.section .text.2 .section .text.2
.thumb_func .thumb_func
.balign 4 .balign 4
high: high:
bx lr bx lr

lld/test/ELF/arm-thumb2-adr.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: echo "SECTIONS { \ // RUN: echo "SECTIONS { \
// RUN: .rodata.low 0x8012 : { *(.rodata.low) } \ // RUN: .rodata.low 0x8012 : { *(.rodata.low) } \
// RUN: .text.low 0x8f00 : { *(.text.low) } \ // RUN: .text.low 0x8f00 : { *(.text.low) } \
// RUN: .text.neg 0x9000 : { *(.text.neg) } \ // RUN: .text.neg 0x9000 : { *(.text.neg) } \
// RUN: .text.pos 0x10000 : { *(.text.pos) } \ // RUN: .text.pos 0x10000 : { *(.text.pos) } \
// RUN: .text.high 0x10100 : { *(.text.high) } \ // RUN: .text.high 0x10100 : { *(.text.high) } \
// RUN: .data_high 0x1100f : { *(.data.high) } \ // RUN: .data_high 0x1100f : { *(.data.high) } \
// RUN: } " > %t.script // RUN: } " > %t.script
// RUN: ld.lld --script %t.script %t.o -o %t // RUN: ld.lld --script %t.script %t.o -o %t
// RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS // RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS
// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t // RUN: llvm-objdump -d --triple=thumbv7m-none-eabi %t
// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s // RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s
/// Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation /// Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation
/// Interesting things to note /// Interesting things to note
/// Range is +- 4095 bytes /// Range is +- 4095 bytes
/// The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use /// The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use
/// 2-byte nops to make some of the adr psuedo instructions 2-byte aligned. /// 2-byte nops to make some of the adr psuedo instructions 2-byte aligned.
.section .rodata.low, "a", %progbits .section .rodata.low, "a", %progbits
Show All 17 Lines
bx lr bx lr
.section .text.neg, "ax", %progbits .section .text.neg, "ax", %progbits
.balign 4 .balign 4
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
nop nop
adr.w r0, dat1 /// adr.w r0, dat1
adr.w r1, dat2 .inst.w 0xf2af0004
.reloc 2, R_ARM_THM_ALU_PREL_11_0, dat1
/// adr.w r1, dat2
.inst.w 0xf2af0104
.reloc 6, R_ARM_THM_ALU_PREL_11_0, dat2
nop nop
adr.w r2, dat3 /// adr.w r2, dat3
adr.w r3, dat4 .inst.w 0xf2af0204
.balign 4 .reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat3
adr.w r0, target1 /// adr.w r3, dat4
.inst.w 0xf2af0304
.reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat4
/// adr.w r0, target1
.inst.w 0xf2af0004
.reloc 0x14, R_ARM_THM_ALU_PREL_11_0, target1
nop nop
adr.w r1, target2 /// adr.w r1, target2
.inst.w 0xf2af0104
.reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, target2
.section .text.pos, "ax", %progbits .section .text.pos, "ax", %progbits
.balign 4 .balign 4
.global pos .global pos
.thumb_func .thumb_func
pos: pos:
adr.w r2, target3 /// adr.w r2, target3
.inst.w 0xf2af0204
.reloc 0, R_ARM_THM_ALU_PREL_11_0, target3
nop nop
adr.w r3, target4 /// adr.w r3, target4
.balign 4 .inst.w 0xf2af0304
adr.w r0, dat5 .reloc 6, R_ARM_THM_ALU_PREL_11_0, target4
adr.w r1, dat6 nop
/// adr.w r0, dat5
.inst.w 0xf2af0004
.reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat5
/// adr.w r1, dat6
.inst.w 0xf2af0104
.reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat6
nop nop
adr.w r2, dat7 /// adr.w r2, dat7
adr.w r3, dat8 .inst.w 0xf2af0204
.reloc 0x16, R_ARM_THM_ALU_PREL_11_0, dat7
/// adr.w r3, dat8
.inst.w 0xf2af0304
.reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, dat8
/// positive addend in instruction, all others are -4 (PC bias) /// positive addend in instruction, all others are -4 (PC bias)
adr.w r4, dat5 + 8 /// adr.w r4, dat5 + 8
.inst.w 0xf20f0404
.reloc 0x1e, R_ARM_THM_ALU_PREL_11_0, dat5 + 8
.section .text.high, "ax", %progbits .section .text.high, "ax", %progbits
.balign 4 .balign 4
.thumb_func .thumb_func
.global target3 .global target3
target3: target3:
bx lr bx lr
.thumb_func .thumb_func
▲ Show 20 Lines • Show All 77 Lines • Show Last 20 Lines

lld/test/ELF/arm-thumb2-ldrlit-err.s

// REQUIRES: arm // REQUIRES: arm
// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s // RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits .section .text.0, "ax", %progbits
.thumb_func .thumb_func
.balign 4 .balign 4
low: low:
bx lr bx lr
nop nop
nop nop
.section .text.1, "ax", %progbits .section .text.1, "ax", %progbits
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095] // CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095]
ldr.w r0, low - 4091 /// ldr.w r0, low - 4091
// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095] .inst.w 0xf85f0fff
ldr.w r0, high + 4091 .reloc 0, R_ARM_THM_PC12, low
// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095]
/// ldr.w r0, high + 4091
.inst.w 0xf8df0ff7
.reloc 4, R_ARM_THM_PC12, high
.section .text.2 .section .text.2
.thumb_func .thumb_func
.balign 4 .balign 4
high: high:
bx lr bx lr

lld/test/ELF/arm-thumb2-ldrlit.s

Show All 38 Lines
bx lr bx lr
.section .text.neg, "ax", %progbits .section .text.neg, "ax", %progbits
.balign 4 .balign 4
.global _start .global _start
.thumb_func .thumb_func
_start: _start:
nop nop
ldr r0, dat1 /// ldr r0, dat1
ldr r1, dat2 .inst.w 0xf85f0004
.reloc 2, R_ARM_THM_PC12, dat1
/// ldr r1, dat2
.inst.w 0xf85f1004
.reloc 6, R_ARM_THM_PC12, dat2
nop nop
ldr r2, dat3 /// ldr r2, dat3
ldr r3, dat4 .inst.w 0xf85f2004
.balign 4 .reloc 0xc, R_ARM_THM_PC12, dat3
ldr r0, target1 /// ldr r3, dat4
.inst.w 0xf85f3004
.reloc 0x10, R_ARM_THM_PC12, dat4
/// ldr r0, target1
.inst.w 0xf85f0004
.reloc 0x14, R_ARM_THM_PC12, target1
nop nop
ldr r1, target2 /// ldr r1, target2
.inst.w 0xf85f1004
.reloc 0x1a, R_ARM_THM_PC12, target2
.section .text.pos, "ax", %progbits .section .text.pos, "ax", %progbits
.balign 4 .balign 4
.global pos .global pos
.thumb_func .thumb_func
pos: pos:
ldr r2, target3 /// ldr r2, target3
.inst.w 0xf85f2004
.reloc 0, R_ARM_THM_PC12, target3
nop nop
ldr r3, target4 /// ldr r3, target4
.balign 4 .inst.w 0xf85f3004
ldr r0, dat5 .reloc 6, R_ARM_THM_PC12, target4
ldr r1, dat6 nop
/// ldr r0, dat5
.inst.w 0xf85f0004
.reloc 0xc, R_ARM_THM_PC12, dat5
/// ldr r1, dat6
.inst.w 0xf85f1004
.reloc 0x10, R_ARM_THM_PC12, dat6
nop nop
ldr r2, dat7 /// ldr r2, dat7
ldr r3, dat8 .inst.w 0xf85f2004
.reloc 0x16, R_ARM_THM_PC12, dat7
/// ldr r3, dat8
.inst.w 0xf85f3004
.reloc 0x1a, R_ARM_THM_PC12, dat8
/// positive addend in instruction, all others are -4 (PC bias) /// positive addend in instruction, all others are -4 (PC bias)
ldr.w r4, dat5 + 8 ///ldr.w r4, dat5 + 8
.inst 0xf8df4004
.reloc 0x1e, R_ARM_THM_PC12, dat5
.section .text.high, "ax", %progbits .section .text.high, "ax", %progbits
.balign 4 .balign 4
.thumb_func .thumb_func
.global target3 .global target3
target3: target3:
bx lr bx lr
.thumb_func .thumb_func
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