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[LegalizeTypes] Handle gaps in legal vector types while widening loads
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Authored by frasercrmck on Mar 24 2020, 3:14 AM.

Details

Summary
On targets where there are gaps in legal vector types then
GenWidenVectorLoads would attempt to create invalid CONCAT_VECTORS nodes
when widening certain vector loads.

For example, on a target where v4i32 and v16i32 are legal (i.e. there is
a "gap" where v8i32 should be) then legalizing v24i32 would attempt to
create node thus:

  v16i32 = CONCAT_VECTORS v4i32, v4i32

The fix is to correctly pad CONCAT_VECTORS nodes with undefs in all
cases.

Diff Detail

Event Timeline

frasercrmck created this revision.Mar 24 2020, 3:14 AM

Note that the best test I've found so far is this:

define void @ldv24i32(<24 x i32>* %ptr) {
  entry:
  %ld = load volatile <24 x i32>, <24 x i32>* %ptr,  align 16
  ret void
}

... but only after editing AMDGPU/SIISelLowering.cpp to remove v8i32 as a legal type.

If anyone knows a better target to test on, I would appreciate the advice.

frasercrmck set the repository for this revision to rG LLVM Github Monorepo.Mar 31 2020, 4:13 AM

This appears to have been committed by @craig.topper in D84463. Great minds, and all that.

frasercrmck abandoned this revision.Oct 27 2020, 2:53 AM