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Differential D76614

[PowerPC]: e500 target can't use lwsync, use msync instead
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Authored by jhibbits on Mar 23 2020, 7:51 AM.

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nemanjai
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Restricted Project
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rGf0990e104b08: [PowerPC]: e500 target can't use lwsync, use msync instead
Summary

The e500 core has a silicon bug that triggers an illegal instruction
program trap on any sync other than msync. Other cores will typically
ignore illegal sync types, and the documentation even implies that the
'illegal' bits are ignored.

Address this hardware deficiency by only using msync, like the PPC440.

Diff Detail

Event Timeline

jhibbits created this revision.Mar 23 2020, 7:51 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 23 2020, 7:51 AM
Herald added subscribers: llvm-commits, shchenz, kbarton and 2 others. · View Herald Transcript
Harbormaster completed remote builds in B50116: Diff 252039.Mar 23 2020, 8:42 AM
Herald added a subscriber: • wuzish. · View Herald TranscriptMar 23 2020, 8:42 AM
nemanjai accepted this revision.Mar 23 2020, 9:56 AM

LGTM. I have no way of verifying this but no reason to doubt it.

This revision is now accepted and ready to land.Mar 23 2020, 9:56 AM
Closed by commit rGf0990e104b08: [PowerPC]: e500 target can't use lwsync, use msync instead (authored by jhibbits). · Explain WhyMar 23 2020, 3:17 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
PowerPC/
2 lines
test/
CodeGen/
PowerPC/
1 line

Diff 252039

llvm/lib/Target/PowerPC/PPC.td

Show First 20 Lines • Show All 446 Lines • ▼ Show 20 Linesdef : ProcessorModel<"g5", G5Model,
[Directive970, FeatureAltivec, [Directive970, FeatureAltivec,
FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX, FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
FeatureFRES, FeatureFRSQRTE, FeatureFRES, FeatureFRSQRTE,
Feature64Bit /*, Feature64BitRegs */, Feature64Bit /*, Feature64BitRegs */,
FeatureMFTB, DeprecatedDST]>; FeatureMFTB, DeprecatedDST]>;
def : ProcessorModel<"e500", PPCE500Model, def : ProcessorModel<"e500", PPCE500Model,
[DirectiveE500, [DirectiveE500,
FeatureICBT, FeatureBookE, FeatureICBT, FeatureBookE,
FeatureISEL, FeatureMFTB, FeatureSPE]>; FeatureISEL, FeatureMFTB, FeatureMSYNC, FeatureSPE]>;
def : ProcessorModel<"e500mc", PPCE500mcModel, def : ProcessorModel<"e500mc", PPCE500mcModel,
[DirectiveE500mc, [DirectiveE500mc,
FeatureSTFIWX, FeatureICBT, FeatureBookE, FeatureSTFIWX, FeatureICBT, FeatureBookE,
FeatureISEL, FeatureMFTB]>; FeatureISEL, FeatureMFTB]>;
def : ProcessorModel<"e5500", PPCE5500Model, def : ProcessorModel<"e5500", PPCE5500Model,
[DirectiveE5500, FeatureMFOCRF, Feature64Bit, [DirectiveE5500, FeatureMFOCRF, Feature64Bit,
FeatureSTFIWX, FeatureICBT, FeatureBookE, FeatureSTFIWX, FeatureICBT, FeatureBookE,
FeatureISEL, FeatureMFTB]>; FeatureISEL, FeatureMFTB]>;
▲ Show 20 Lines • Show All 112 Lines • Show Last 20 Lines

llvm/test/CodeGen/PowerPC/atomics-fences.ll

; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=440 | FileCheck %s --check-prefix=PPC440 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=440 | FileCheck %s --check-prefix=PPC440
; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=PPC440
; Fences ; Fences
define void @fence_acquire() { define void @fence_acquire() {
; CHECK-LABEL: fence_acquire ; CHECK-LABEL: fence_acquire
; CHECK: lwsync ; CHECK: lwsync
; PPC440-NOT: lwsync ; PPC440-NOT: lwsync
; PPC440: msync ; PPC440: msync
fence acquire fence acquire
Show All 17 Lines