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Differential D76113

[ExpandMemCmp] Correctly set alignment of generated loads
ClosedPublic

Authored by aqjune on Mar 12 2020, 6:10 PM.

Details

Reviewers
courbet
Commits
rG7aecf2323c4e: [ExpandMemCmp] Correctly set alignment of generated loads
Summary

This is a part of the series of efforts for correcting alignment of memory operations.
(Another related bugs: https://bugs.llvm.org/show_bug.cgi?id=44388 , https://bugs.llvm.org/show_bug.cgi?id=44543 )

This fixes https://bugs.llvm.org/show_bug.cgi?id=43880 by giving default alignment of loads to 1.

The test CodeGen/AArch64/bcmp-inline-small.ll should have been changed; it was introduced by https://reviews.llvm.org/D64805 . I talked with @evandro, and confirmed that the test is okay to be changed.
Other two tests from PowerPC needed changes as well, but fixes were straightforward.

Diff Detail

Event Timeline

aqjune created this revision.Mar 12 2020, 6:10 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 12 2020, 6:10 PM
Herald added subscribers: llvm-commits, danielkiss, steven.zhang and 3 others. · View Herald Transcript
aqjune added a reviewer: courbet.Mar 12 2020, 6:11 PM
Herald added a subscriber: • wuzish. · View Herald TranscriptMar 12 2020, 6:11 PM
Harbormaster completed remote builds in B49085: Diff 250113.Mar 12 2020, 7:04 PM
aqjune updated this revision to Diff 250126.Mar 12 2020, 10:20 PM

Update test Transforms/ExpandMemCmp/X86/memcmp.ll

Harbormaster completed remote builds in B49095: Diff 250126.Mar 12 2020, 11:19 PM
courbet added a comment.Mar 16 2020, 12:36 AM

Can you please add a test with an explicit parameter alignment ?

courbet added inline comments.Mar 16 2020, 12:40 AM
llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
38–41

I'm not sure what this checks exactly.
Can you expand the checked pattern ? It would make it clearer what we're looking for.

courbet added a subscriber: gchatelet.Mar 16 2020, 12:53 AM
aqjune updated this revision to Diff 250495.Mar 16 2020, 1:53 AM
  • Add tests that have alignments initially given to fn args
  • Let alignment be successfully inferred when gep is involved
aqjune marked an inline comment as done.Mar 16 2020, 1:55 AM
aqjune added inline comments.
llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
38–41

It checks whether ldrb is repeated 30 times (for reading 15 bytes of %s1 and %s2 each).
I think expanding this would be a bit verbose; I attach the output asm file.

out.strict-aligned.S3 KBDownload

aqjune added a subscriber: nlopes.Mar 16 2020, 1:57 AM
courbet added inline comments.Mar 16 2020, 2:09 AM
llvm/lib/CodeGen/ExpandMemCmp.cpp
286

Because alignments are always powers of two, assuming n<m, gcd(2^n, 2^m) is the same as 2^n * gcd(1, 2^(m-n)), or 2^n, i.e. min(2^n, 2^m). So please use Align commonAlignment(Align A, uint64_t Offset) from Alignment.h

llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
38–41

ping

llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll
25

Please submit the base tests to show the diffs.

Harbormaster completed remote builds in B49282: Diff 250495.Mar 16 2020, 2:10 AM
courbet accepted this revision.Mar 16 2020, 2:14 AM

LGTM when the comments are addressed.

llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
38–41

OK, that's what I suspected (this behaviour of Filecheck is undocumented and I coul dnot find similar usages). Well, that's an issue because this blows up the number of loads, which is not really desirable (@evandro FYI). But this is better than broken code, so LGTM.

This revision is now accepted and ready to land.Mar 16 2020, 2:14 AM
aqjune added a comment.Mar 16 2020, 2:30 AM

Thanks. I am temporarily out of office, will be back and address comments soon

gchatelet added inline comments.Mar 16 2020, 3:33 AM
llvm/lib/CodeGen/ExpandMemCmp.cpp
276

LhsSource->getPointerAlignment(DL).valueOrOne()
and below as well.

aqjune updated this revision to Diff 250547.Mar 16 2020, 6:22 AM

Address comments

aqjune mentioned this in rGacdcd23b7b07: Add tests to ExpandMemCmp/X86/memcmp.ll before submitting D76113.Mar 16 2020, 6:29 AM
aqjune updated this revision to Diff 250551.Mar 16 2020, 6:38 AM
aqjune marked 2 inline comments as done.

diff from precommitted test

aqjune marked 2 inline comments as done.Mar 16 2020, 6:41 AM
aqjune added inline comments.
llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
38–41

It is '“CHECK-COUNT:” directive' at FileCheck doc (-COUNT was needed to make it correctly work, I fixed it)

Closed by commit rG7aecf2323c4e: [ExpandMemCmp] Correctly set alignment of generated loads (authored by aqjune). · Explain WhyMar 16 2020, 7:00 AM
This revision was automatically updated to reflect the committed changes.
Harbormaster failed remote builds in B49303: Diff 250547!Mar 16 2020, 7:03 AM
Harbormaster failed remote builds in B49305: Diff 250551!Mar 16 2020, 7:35 AM

Revision Contents

PathSize
llvm/
lib/
CodeGen/
8 lines
test/
CodeGen/
AArch64/
31 lines
PowerPC/
6 lines
4 lines
Transforms/
ExpandMemCmp/
X86/
336 lines

Diff 250553

llvm/lib/CodeGen/ExpandMemCmp.cpp

Show First 20 Lines • Show All 267 Lines • ▼ Show 20 Lines
MemCmpExpansion::LoadPair MemCmpExpansion::getLoadPair(Type *LoadSizeType, MemCmpExpansion::LoadPair MemCmpExpansion::getLoadPair(Type *LoadSizeType,
bool NeedsBSwap, bool NeedsBSwap,
Type *CmpSizeType, Type *CmpSizeType,
unsigned OffsetBytes) { unsigned OffsetBytes) {
// Get the memory source at offset `OffsetBytes`. // Get the memory source at offset `OffsetBytes`.
Value *LhsSource = CI->getArgOperand(0); Value *LhsSource = CI->getArgOperand(0);
Value *RhsSource = CI->getArgOperand(1); Value *RhsSource = CI->getArgOperand(1);
Align LhsAlign = LhsSource->getPointerAlignment(DL).valueOrOne();
gchateletUnsubmitted
Done
ReplyInline Actions

LhsSource->getPointerAlignment(DL).valueOrOne()
and below as well.

gchatelet: `LhsSource->getPointerAlignment(DL).valueOrOne()` and below as well.
Align RhsAlign = RhsSource->getPointerAlignment(DL).valueOrOne();
if (OffsetBytes > 0) { if (OffsetBytes > 0) {
auto *ByteType = Type::getInt8Ty(CI->getContext()); auto *ByteType = Type::getInt8Ty(CI->getContext());
LhsSource = Builder.CreateConstGEP1_64( LhsSource = Builder.CreateConstGEP1_64(
ByteType, Builder.CreateBitCast(LhsSource, ByteType->getPointerTo()), ByteType, Builder.CreateBitCast(LhsSource, ByteType->getPointerTo()),
OffsetBytes); OffsetBytes);
RhsSource = Builder.CreateConstGEP1_64( RhsSource = Builder.CreateConstGEP1_64(
ByteType, Builder.CreateBitCast(RhsSource, ByteType->getPointerTo()), ByteType, Builder.CreateBitCast(RhsSource, ByteType->getPointerTo()),
OffsetBytes); OffsetBytes);
LhsAlign = commonAlignment(LhsAlign, OffsetBytes);
courbetUnsubmitted
Done
ReplyInline Actions

Because alignments are always powers of two, assuming n<m, gcd(2^n, 2^m) is the same as 2^n * gcd(1, 2^(m-n)), or 2^n, i.e. min(2^n, 2^m). So please use Align commonAlignment(Align A, uint64_t Offset) from Alignment.h

courbet: Because alignments are always powers of two, assuming n<m, `gcd(2^n, 2^m)` is the same as `2^n…
RhsAlign = commonAlignment(RhsAlign, OffsetBytes);
} }
LhsSource = Builder.CreateBitCast(LhsSource, LoadSizeType->getPointerTo()); LhsSource = Builder.CreateBitCast(LhsSource, LoadSizeType->getPointerTo());
RhsSource = Builder.CreateBitCast(RhsSource, LoadSizeType->getPointerTo()); RhsSource = Builder.CreateBitCast(RhsSource, LoadSizeType->getPointerTo());
// Create a constant or a load from the source. // Create a constant or a load from the source.
Value *Lhs = nullptr; Value *Lhs = nullptr;
if (auto *C = dyn_cast<Constant>(LhsSource)) if (auto *C = dyn_cast<Constant>(LhsSource))
Lhs = ConstantFoldLoadFromConstPtr(C, LoadSizeType, DL); Lhs = ConstantFoldLoadFromConstPtr(C, LoadSizeType, DL);
if (!Lhs) if (!Lhs)
Lhs = Builder.CreateLoad(LoadSizeType, LhsSource); Lhs = Builder.CreateAlignedLoad(LoadSizeType, LhsSource, LhsAlign);
Value *Rhs = nullptr; Value *Rhs = nullptr;
if (auto *C = dyn_cast<Constant>(RhsSource)) if (auto *C = dyn_cast<Constant>(RhsSource))
Rhs = ConstantFoldLoadFromConstPtr(C, LoadSizeType, DL); Rhs = ConstantFoldLoadFromConstPtr(C, LoadSizeType, DL);
if (!Rhs) if (!Rhs)
Rhs = Builder.CreateLoad(LoadSizeType, RhsSource); Rhs = Builder.CreateAlignedLoad(LoadSizeType, RhsSource, RhsAlign);
// Swap bytes if required. // Swap bytes if required.
if (NeedsBSwap) { if (NeedsBSwap) {
Function *Bswap = Intrinsic::getDeclaration(CI->getModule(), Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),
Intrinsic::bswap, LoadSizeType); Intrinsic::bswap, LoadSizeType);
Lhs = Builder.CreateCall(Bswap, Lhs); Lhs = Builder.CreateCall(Bswap, Lhs);
Rhs = Builder.CreateCall(Bswap, Rhs); Rhs = Builder.CreateCall(Bswap, Rhs);
} }
▲ Show 20 Lines • Show All 562 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/bcmp-inline-small.ll

; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECKN ; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECKN
; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu -mattr=strict-align | FileCheck %s --check-prefixes=CHECK,CHECKS ; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu -mattr=strict-align | FileCheck %s --check-prefixes=CHECK,CHECKS
declare i32 @bcmp(i8*, i8*, i64) nounwind readonly declare i32 @bcmp(i8*, i8*, i64) nounwind readonly
declare i32 @memcmp(i8*, i8*, i64) nounwind readonly declare i32 @memcmp(i8*, i8*, i64) nounwind readonly
define i1 @bcmp_b2(i8* %s1, i8* %s2) { define i1 @test_b2(i8* %s1, i8* %s2) {
entry: entry:
%bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15) %bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15)
%ret = icmp eq i32 %bcmp, 0 %ret = icmp eq i32 %bcmp, 0
ret i1 %ret ret i1 %ret
; CHECK-LABEL: bcmp_b2: ; CHECK-LABEL: test_b2:
; CHECK-NOT: bl bcmp
; CHECKN: ldr x
; CHECKN-NEXT: ldr x
; CHECKN-NEXT: ldur x
; CHECKN-NEXT: ldur x
; CHECKS-COUNT-30: ldrb w
}
define i1 @test_b2_align8(i8* align 8 %s1, i8* align 8 %s2) {
entry:
%bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15)
%ret = icmp eq i32 %bcmp, 0
ret i1 %ret
; CHECK-LABEL: test_b2_align8:
; CHECK-NOT: bl bcmp ; CHECK-NOT: bl bcmp
; CHECKN: ldr x ; CHECKN: ldr x
; CHECKN-NEXT: ldr x ; CHECKN-NEXT: ldr x
; CHECKN-NEXT: ldur x ; CHECKN-NEXT: ldur x
; CHECKN-NEXT: ldur x ; CHECKN-NEXT: ldur x
; CHECKS: ldr x ; CHECKS: ldr x
; CHECKS-NEXT: ldr x ; CHECKS-NEXT: ldr x
; CHECKS-NEXT: ldr w ; CHECKS-NEXT: ldr w
; CHECKS-NEXT: ldr w ; CHECKS-NEXT: ldr w
; CHECKS-NEXT: ldrh w ; CHECKS-NEXT: ldrh w
; CHECKS-NEXT: ldrh w ; CHECKS-NEXT: ldrh w
; CHECKS-NEXT: ldrb w ; CHECKS-NEXT: ldrb w
; CHECKS-NEXT: ldrb w ; CHECKS-NEXT: ldrb w
courbetUnsubmitted
Not Done
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I'm not sure what this checks exactly.
Can you expand the checked pattern ? It would make it clearer what we're looking for.

courbet: I'm not sure what this checks exactly. Can you expand the checked pattern ? It would make it…
aqjuneAuthorUnsubmitted
Done
ReplyInline Actions

It checks whether ldrb is repeated 30 times (for reading 15 bytes of %s1 and %s2 each).
I think expanding this would be a bit verbose; I attach the output asm file.

out.strict-aligned.S3 KBDownload

aqjune: It checks whether ldrb is repeated 30 times (for reading 15 bytes of %s1 and %s2 each). I think…
courbetUnsubmitted
Not Done
ReplyInline Actions

OK, that's what I suspected (this behaviour of Filecheck is undocumented and I coul dnot find similar usages). Well, that's an issue because this blows up the number of loads, which is not really desirable (@evandro FYI). But this is better than broken code, so LGTM.

courbet: OK, that's what I suspected (this behaviour of `Filecheck` is undocumented and I coul dnot find…
aqjuneAuthorUnsubmitted
Done
ReplyInline Actions

It is '“CHECK-COUNT:” directive' at FileCheck doc (-COUNT was needed to make it correctly work, I fixed it)

aqjune: It is '“CHECK-COUNT:” directive' at FileCheck doc (-COUNT was needed to make it correctly work…
courbetUnsubmitted
Not Done
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ping

courbet: ping
} }
define i1 @bcmp_bs(i8* %s1, i8* %s2) optsize { define i1 @test_bs(i8* %s1, i8* %s2) optsize {
entry: entry:
%memcmp = call i32 @memcmp(i8* %s1, i8* %s2, i64 31) %memcmp = call i32 @memcmp(i8* %s1, i8* %s2, i64 31)
%ret = icmp eq i32 %memcmp, 0 %ret = icmp eq i32 %memcmp, 0
ret i1 %ret ret i1 %ret
; CHECK-LABEL: bcmp_bs: ; CHECK-LABEL: test_bs:
; CHECKN-NOT: bl memcmp ; CHECKN-NOT: bl memcmp
; CHECKN: ldp x ; CHECKN: ldp x
; CHECKN-NEXT: ldp x ; CHECKN-NEXT: ldp x
; CHECKN-NEXT: ldr x ; CHECKN-NEXT: ldr x
; CHECKN-NEXT: ldr x ; CHECKN-NEXT: ldr x
; CHECKN-NEXT: ldur x ; CHECKN-NEXT: ldur x
; CHECKN-NEXT: ldur x ; CHECKN-NEXT: ldur x
; CHECKS: bl memcmp ; CHECKS: bl memcmp
} }

llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll

Show All 29 Lines; CHECK-NEXT: blr
%. = zext i1 %not.cmp to i32 %. = zext i1 %not.cmp to i32
ret i32 %. ret i32 %.
} }
; Check 16 bytes - requires 2 loads for each param (or use vectors?). ; Check 16 bytes - requires 2 loads for each param (or use vectors?).
define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) { define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) {
; CHECK-LABEL: zeroEqualityTest01: ; CHECK-LABEL: zeroEqualityTest01:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: ld 5, 0(3) ; CHECK-NEXT: ldx 5, 0, 3
; CHECK-NEXT: ld 6, 0(4) ; CHECK-NEXT: ldx 6, 0, 4
; CHECK-NEXT: cmpld 5, 6 ; CHECK-NEXT: cmpld 5, 6
; CHECK-NEXT: bne 0, .LBB1_2 ; CHECK-NEXT: bne 0, .LBB1_2
; CHECK-NEXT: # %bb.1: # %loadbb1 ; CHECK-NEXT: # %bb.1: # %loadbb1
; CHECK-NEXT: ld 3, 8(3) ; CHECK-NEXT: ld 3, 8(3)
; CHECK-NEXT: ld 4, 8(4) ; CHECK-NEXT: ld 4, 8(4)
; CHECK-NEXT: cmpld 3, 4 ; CHECK-NEXT: cmpld 3, 4
; CHECK-NEXT: li 3, 0 ; CHECK-NEXT: li 3, 0
; CHECK-NEXT: beq 0, .LBB1_3 ; CHECK-NEXT: beq 0, .LBB1_3
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines; CHECK-NEXT: blr
%not.tobool = icmp eq i32 %call, 0 %not.tobool = icmp eq i32 %call, 0
%cond = zext i1 %not.tobool to i32 %cond = zext i1 %not.tobool to i32
ret i32 %cond ret i32 %cond
} }
define signext i32 @equalityFoldOneConstant(i8* %X) { define signext i32 @equalityFoldOneConstant(i8* %X) {
; CHECK-LABEL: equalityFoldOneConstant: ; CHECK-LABEL: equalityFoldOneConstant:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: ld 4, 0(3) ; CHECK-NEXT: ldx 4, 0, 3
; CHECK-NEXT: li 5, 1 ; CHECK-NEXT: li 5, 1
; CHECK-NEXT: sldi 5, 5, 32 ; CHECK-NEXT: sldi 5, 5, 32
; CHECK-NEXT: cmpld 4, 5 ; CHECK-NEXT: cmpld 4, 5
; CHECK-NEXT: bne 0, .LBB6_2 ; CHECK-NEXT: bne 0, .LBB6_2
; CHECK-NEXT: # %bb.1: # %loadbb1 ; CHECK-NEXT: # %bb.1: # %loadbb1
; CHECK-NEXT: li 4, 3 ; CHECK-NEXT: li 4, 3
; CHECK-NEXT: ld 3, 8(3) ; CHECK-NEXT: ld 3, 8(3)
; CHECK-NEXT: sldi 4, 4, 32 ; CHECK-NEXT: sldi 4, 4, 32
Show All 36 Lines

llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=PPC64LE ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=PPC64LE
; This tests interaction between MergeICmp and ExpandMemCmp. ; This tests interaction between MergeICmp and ExpandMemCmp.
%"struct.std::pair" = type { i32, i32 } %"struct.std::pair" = type { i32, i32 }
define zeroext i1 @opeq1( define zeroext i1 @opeq1(
; PPC64LE-LABEL: opeq1: ; PPC64LE-LABEL: opeq1:
; PPC64LE: # %bb.0: # %"entry+land.rhs.i" ; PPC64LE: # %bb.0: # %"entry+land.rhs.i"
; PPC64LE-NEXT: ld 3, 0(3) ; PPC64LE-NEXT: ldx 3, 0, 3
; PPC64LE-NEXT: ld 4, 0(4) ; PPC64LE-NEXT: ldx 4, 0, 4
; PPC64LE-NEXT: xor 3, 3, 4 ; PPC64LE-NEXT: xor 3, 3, 4
; PPC64LE-NEXT: cntlzd 3, 3 ; PPC64LE-NEXT: cntlzd 3, 3
; PPC64LE-NEXT: rldicl 3, 3, 58, 63 ; PPC64LE-NEXT: rldicl 3, 3, 58, 63
; PPC64LE-NEXT: blr ; PPC64LE-NEXT: blr
%"struct.std::pair"* nocapture readonly dereferenceable(8) %a, %"struct.std::pair"* nocapture readonly dereferenceable(8) %a,
%"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {
entry: entry:
%first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0 %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0
Show All 20 Lines

llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -expandmemcmp -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32 ; RUN: opt -S -expandmemcmp -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32
; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD ; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD
; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD ; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD
declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) declare i32 @memcmp(i8* nocapture, i8* nocapture, i64)
define i32 @cmp2(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp2(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp2( ; ALL-LABEL: @cmp2(
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 1
; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 1
; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) ; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) ; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32 ; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32 ; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32
; ALL-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]] ; ALL-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]]
; ALL-NEXT: ret i32 [[TMP9]] ; ALL-NEXT: ret i32 [[TMP9]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
ret i32 %call ret i32 %call
} }
define i32 @cmp2_align2(i8* nocapture readonly align 2 %x, i8* nocapture readonly align 2 %y) { define i32 @cmp2_align2(i8* nocapture readonly align 2 %x, i8* nocapture readonly align 2 %y) {
courbetUnsubmitted
Done
ReplyInline Actions

Please submit the base tests to show the diffs.

courbet: Please submit the base tests to show the diffs.
; ALL-LABEL: @cmp2_align2( ; ALL-LABEL: @cmp2_align2(
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2
; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2
; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) ; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) ; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32 ; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32 ; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32
; ALL-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]] ; ALL-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]]
; ALL-NEXT: ret i32 [[TMP9]] ; ALL-NEXT: ret i32 [[TMP9]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
ret i32 %call ret i32 %call
} }
define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp3( ; ALL-LABEL: @cmp3(
; ALL-NEXT: br label [[LOADBB:%.*]] ; ALL-NEXT: br label [[LOADBB:%.*]]
; ALL: res_block: ; ALL: res_block:
; ALL-NEXT: [[TMP1:%.*]] = icmp ult i16 [[TMP7:%.*]], [[TMP8:%.*]] ; ALL-NEXT: [[TMP1:%.*]] = icmp ult i16 [[TMP7:%.*]], [[TMP8:%.*]]
; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; ALL-NEXT: br label [[ENDBLOCK:%.*]] ; ALL-NEXT: br label [[ENDBLOCK:%.*]]
; ALL: loadbb: ; ALL: loadbb:
; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i16* ; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i16*
; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; ALL-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP3]] ; ALL-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP3]], align 1
; ALL-NEXT: [[TMP6:%.*]] = load i16, i16* [[TMP4]] ; ALL-NEXT: [[TMP6:%.*]] = load i16, i16* [[TMP4]], align 1
; ALL-NEXT: [[TMP7]] = call i16 @llvm.bswap.i16(i16 [[TMP5]]) ; ALL-NEXT: [[TMP7]] = call i16 @llvm.bswap.i16(i16 [[TMP5]])
; ALL-NEXT: [[TMP8]] = call i16 @llvm.bswap.i16(i16 [[TMP6]]) ; ALL-NEXT: [[TMP8]] = call i16 @llvm.bswap.i16(i16 [[TMP6]])
; ALL-NEXT: [[TMP9:%.*]] = icmp eq i16 [[TMP7]], [[TMP8]] ; ALL-NEXT: [[TMP9:%.*]] = icmp eq i16 [[TMP7]], [[TMP8]]
; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] ; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
; ALL: loadbb1: ; ALL: loadbb1:
; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 2 ; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 2
; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 2 ; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 2
; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]] ; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1
; ALL-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]] ; ALL-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]], align 1
; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 ; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
; ALL-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32 ; ALL-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
; ALL-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]] ; ALL-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
; ALL-NEXT: br label [[ENDBLOCK]] ; ALL-NEXT: br label [[ENDBLOCK]]
; ALL: endblock: ; ALL: endblock:
; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
; ALL-NEXT: ret i32 [[PHI_RES]] ; ALL-NEXT: ret i32 [[PHI_RES]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3)
ret i32 %call ret i32 %call
} }
define i32 @cmp4(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp4(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp4( ; ALL-LABEL: @cmp4(
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) ; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) ; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])
; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] ; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
; ALL-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]] ; ALL-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]
; ALL-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 ; ALL-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
; ALL-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 ; ALL-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
; ALL-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]] ; ALL-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]]
; ALL-NEXT: ret i32 [[TMP11]] ; ALL-NEXT: ret i32 [[TMP11]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
ret i32 %call ret i32 %call
} }
define i32 @cmp5(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp5(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp5( ; ALL-LABEL: @cmp5(
; ALL-NEXT: br label [[LOADBB:%.*]] ; ALL-NEXT: br label [[LOADBB:%.*]]
; ALL: res_block: ; ALL: res_block:
; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP7:%.*]], [[TMP8:%.*]] ; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP7:%.*]], [[TMP8:%.*]]
; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; ALL-NEXT: br label [[ENDBLOCK:%.*]] ; ALL-NEXT: br label [[ENDBLOCK:%.*]]
; ALL: loadbb: ; ALL: loadbb:
; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32* ; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32*
; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; ALL-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] ; ALL-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 1
; ALL-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]] ; ALL-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 1
; ALL-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]]) ; ALL-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
; ALL-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]]) ; ALL-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
; ALL-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]] ; ALL-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] ; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
; ALL: loadbb1: ; ALL: loadbb1:
; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4
; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]] ; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1
; ALL-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]] ; ALL-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]], align 1
; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 ; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
; ALL-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32 ; ALL-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
; ALL-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]] ; ALL-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
; ALL-NEXT: br label [[ENDBLOCK]] ; ALL-NEXT: br label [[ENDBLOCK]]
; ALL: endblock: ; ALL: endblock:
; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
; ALL-NEXT: ret i32 [[PHI_RES]] ; ALL-NEXT: ret i32 [[PHI_RES]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5)
ret i32 %call ret i32 %call
} }
define i32 @cmp6(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp6(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp6( ; ALL-LABEL: @cmp6(
; ALL-NEXT: br label [[LOADBB:%.*]] ; ALL-NEXT: br label [[LOADBB:%.*]]
; ALL: res_block: ; ALL: res_block:
; ALL-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ] ; ALL-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
; ALL-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ] ; ALL-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]] ; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; ALL-NEXT: br label [[ENDBLOCK:%.*]] ; ALL-NEXT: br label [[ENDBLOCK:%.*]]
; ALL: loadbb: ; ALL: loadbb:
; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32* ; ALL-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32*
; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; ALL-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; ALL-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] ; ALL-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 1
; ALL-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]] ; ALL-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 1
; ALL-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]]) ; ALL-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
; ALL-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]]) ; ALL-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
; ALL-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]] ; ALL-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] ; ALL-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; ALL: loadbb1: ; ALL: loadbb1:
; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4
; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; ALL-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; ALL-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i16* ; ALL-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i16*
; ALL-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i16* ; ALL-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i16*
; ALL-NEXT: [[TMP14:%.*]] = load i16, i16* [[TMP12]] ; ALL-NEXT: [[TMP14:%.*]] = load i16, i16* [[TMP12]], align 1
; ALL-NEXT: [[TMP15:%.*]] = load i16, i16* [[TMP13]] ; ALL-NEXT: [[TMP15:%.*]] = load i16, i16* [[TMP13]], align 1
; ALL-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]]) ; ALL-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
; ALL-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]]) ; ALL-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]])
; ALL-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i32 ; ALL-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i32
; ALL-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i32 ; ALL-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i32
; ALL-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP18]], [[TMP19]] ; ALL-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP18]], [[TMP19]]
; ALL-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]] ; ALL-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; ALL: endblock: ; ALL: endblock:
; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
Show All 19 Lines
; X32-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ] ; X32-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
; X32-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ] ; X32-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
; X32-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]] ; X32-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
; X32-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; X32-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X32-NEXT: br label [[ENDBLOCK:%.*]] ; X32-NEXT: br label [[ENDBLOCK:%.*]]
; X32: loadbb: ; X32: loadbb:
; X32-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] ; X32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 1
; X32-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]] ; X32-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 1
; X32-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]]) ; X32-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
; X32-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]]) ; X32-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
; X32-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]] ; X32-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
; X32-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] ; X32-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; X32: loadbb1: ; X32: loadbb1:
; X32-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X32-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X32-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X32-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X32-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i32* ; X32-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i32*
; X32-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i32* ; X32-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i32*
; X32-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]] ; X32-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 1
; X32-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]] ; X32-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 1
; X32-NEXT: [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]]) ; X32-NEXT: [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
; X32-NEXT: [[TMP17]] = call i32 @llvm.bswap.i32(i32 [[TMP15]]) ; X32-NEXT: [[TMP17]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])
; X32-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP16]], [[TMP17]] ; X32-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP16]], [[TMP17]]
; X32-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]] ; X32-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; X32: endblock: ; X32: endblock:
; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
; X32-NEXT: ret i32 [[PHI_RES]] ; X32-NEXT: ret i32 [[PHI_RES]]
; ;
; X64-LABEL: @cmp8( ; X64-LABEL: @cmp8(
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]]) ; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]]) ; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])
; X64-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]] ; X64-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]]
; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]] ; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]
; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 ; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 ; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
; X64-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]] ; X64-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]]
; X64-NEXT: ret i32 [[TMP11]] ; X64-NEXT: ret i32 [[TMP11]]
Show All 11 Lines
; X64-NEXT: br label [[LOADBB:%.*]] ; X64-NEXT: br label [[LOADBB:%.*]]
; X64: res_block: ; X64: res_block:
; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP7:%.*]], [[TMP8:%.*]] ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP7:%.*]], [[TMP8:%.*]]
; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X64-NEXT: br label [[ENDBLOCK:%.*]] ; X64-NEXT: br label [[ENDBLOCK:%.*]]
; X64: loadbb: ; X64: loadbb:
; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]] ; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]], align 1
; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] ; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 1
; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]]) ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]] ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
; X64: loadbb1: ; X64: loadbb1:
; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]] ; X64-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1
; X64-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]] ; X64-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP11]], align 1
; X64-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 ; X64-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
; X64-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32 ; X64-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
; X64-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]] ; X64-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
; X64-NEXT: br label [[ENDBLOCK]] ; X64-NEXT: br label [[ENDBLOCK]]
; X64: endblock: ; X64: endblock:
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
; X64-NEXT: ret i32 [[PHI_RES]] ; X64-NEXT: ret i32 [[PHI_RES]]
; ;
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; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ] ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ] ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X64-NEXT: br label [[ENDBLOCK:%.*]] ; X64-NEXT: br label [[ENDBLOCK:%.*]]
; X64: loadbb: ; X64: loadbb:
; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]] ; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]], align 1
; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] ; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 1
; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]]) ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]] ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; X64: loadbb1: ; X64: loadbb1:
; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i16* ; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i16*
; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i16* ; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i16*
; X64-NEXT: [[TMP14:%.*]] = load i16, i16* [[TMP12]] ; X64-NEXT: [[TMP14:%.*]] = load i16, i16* [[TMP12]], align 1
; X64-NEXT: [[TMP15:%.*]] = load i16, i16* [[TMP13]] ; X64-NEXT: [[TMP15:%.*]] = load i16, i16* [[TMP13]], align 1
; X64-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]]) ; X64-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
; X64-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]]) ; X64-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]])
; X64-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i64 ; X64-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i64
; X64-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i64 ; X64-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i64
; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]] ; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]]
; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]] ; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; X64: endblock: ; X64: endblock:
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
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; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ] ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ] ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X64-NEXT: br label [[ENDBLOCK:%.*]] ; X64-NEXT: br label [[ENDBLOCK:%.*]]
; X64: loadbb: ; X64: loadbb:
; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]] ; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]], align 1
; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] ; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 1
; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]]) ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]] ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; X64: loadbb1: ; X64: loadbb1:
; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i32* ; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i32*
; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i32* ; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i32*
; X64-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]] ; X64-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 1
; X64-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]] ; X64-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 1
; X64-NEXT: [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]]) ; X64-NEXT: [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
; X64-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]]) ; X64-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])
; X64-NEXT: [[TMP18]] = zext i32 [[TMP16]] to i64 ; X64-NEXT: [[TMP18]] = zext i32 [[TMP16]] to i64
; X64-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64 ; X64-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64
; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]] ; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]]
; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]] ; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; X64: endblock: ; X64: endblock:
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
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; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ] ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ] ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X64-NEXT: br label [[ENDBLOCK:%.*]] ; X64-NEXT: br label [[ENDBLOCK:%.*]]
; X64: loadbb: ; X64: loadbb:
; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]] ; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]], align 1
; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] ; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 1
; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]]) ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]] ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; X64: loadbb1: ; X64: loadbb1:
; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i64* ; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to i64*
; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i64* ; X64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i64*
; X64-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP12]] ; X64-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP12]], align 1
; X64-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP13]] ; X64-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP13]], align 1
; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]]) ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]]) ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]] ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]] ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; X64: endblock: ; X64: endblock:
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ] ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
; X64-NEXT: ret i32 [[PHI_RES]] ; X64-NEXT: ret i32 [[PHI_RES]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16)
ret i32 %call ret i32 %call
} }
define i32 @cmp_eq2(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq2(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp_eq2( ; ALL-LABEL: @cmp_eq2(
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 1
; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 1
; ALL-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]] ; ALL-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 ; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0 ; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; ALL-NEXT: ret i32 [[CONV]] ; ALL-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq3(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq3( ; X32-LABEL: @cmp_eq3(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; X32-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 1
; X32-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 1
; X32-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2
; X32-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X32-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X32-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X32-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X32-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i16 ; X32-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i16
; X32-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i16 ; X32-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i16
; X32-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]] ; X32-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]]
; X32-NEXT: [[TMP13:%.*]] = or i16 [[TMP5]], [[TMP12]] ; X32-NEXT: [[TMP13:%.*]] = or i16 [[TMP5]], [[TMP12]]
; X32-NEXT: [[TMP14:%.*]] = icmp ne i16 [[TMP13]], 0 ; X32-NEXT: [[TMP14:%.*]] = icmp ne i16 [[TMP13]], 0
; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64_1LD-LABEL: @cmp_eq3( ; X64_1LD-LABEL: @cmp_eq3(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2
; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]] ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq3( ; X64_2LD-LABEL: @cmp_eq3(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2
; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i16 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i16
; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i16 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i16
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i16 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i16 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i16 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i16 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq4(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq4(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp_eq4( ; ALL-LABEL: @cmp_eq4(
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; ALL-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] ; ALL-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 ; ALL-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0 ; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; ALL-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; ALL-NEXT: ret i32 [[CONV]] ; ALL-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq5(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq5(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq5( ; X32-LABEL: @cmp_eq5(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X32-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X32-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X32-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X32-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X32-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i32 ; X32-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i32
; X32-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i32 ; X32-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i32
; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] ; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]] ; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 ; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64_1LD-LABEL: @cmp_eq5( ; X64_1LD-LABEL: @cmp_eq5(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]] ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq5( ; X64_2LD-LABEL: @cmp_eq5(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i32 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i32
; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i32 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i32
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq6(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq6(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq6( ; X32-LABEL: @cmp_eq6(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X32-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X32-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 1
; X32-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X32-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 1
; X32-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32 ; X32-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
; X32-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32 ; X32-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
; X32-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]] ; X32-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
; X32-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]] ; X32-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
; X32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 ; X32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
; X32-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X32-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64_1LD-LABEL: @cmp_eq6( ; X64_1LD-LABEL: @cmp_eq6(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq6( ; X64_2LD-LABEL: @cmp_eq6(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]] ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]] ; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq6_align4(i8* nocapture readonly align 4 %x, i8* nocapture readonly align 4 %y) { define i32 @cmp_eq6_align4(i8* nocapture readonly align 4 %x, i8* nocapture readonly align 4 %y) {
; X32-LABEL: @cmp_eq6_align4( ; X32-LABEL: @cmp_eq6_align4(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4
; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X32-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X32-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 4
; X32-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X32-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 4
; X32-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32 ; X32-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
; X32-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32 ; X32-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
; X32-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]] ; X32-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
; X32-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]] ; X32-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
; X32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 ; X32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
; X32-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X32-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64_1LD-LABEL: @cmp_eq6_align4( ; X64_1LD-LABEL: @cmp_eq6_align4(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 4
; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 4
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq6_align4( ; X64_2LD-LABEL: @cmp_eq6_align4(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 4
; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 4
; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]] ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]] ; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq7(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq7(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq7( ; X32-LABEL: @cmp_eq7(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3
; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X32-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X32-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X32-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X32-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] ; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]] ; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 ; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64_1LD-LABEL: @cmp_eq7( ; X64_1LD-LABEL: @cmp_eq7(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq7( ; X64_2LD-LABEL: @cmp_eq7(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 7) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 7)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq8(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq8(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq8( ; X32-LABEL: @cmp_eq8(
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* ; X32-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* ; X32-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] ; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 1
; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] ; X32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 1
; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] ; X32-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 ; X32-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4
; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 ; X32-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4
; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X32-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X32-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X32-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X32-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X32-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] ; X32-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]] ; X32-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 ; X32-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X32-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64-LABEL: @cmp_eq8( ; X64-LABEL: @cmp_eq8(
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64-NEXT: ret i32 [[CONV]] ; X64-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
Show All 10 Lines
; ;
; X64_1LD-LABEL: @cmp_eq9( ; X64_1LD-LABEL: @cmp_eq9(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]] ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq9( ; X64_2LD-LABEL: @cmp_eq9(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]] ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1
; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]] ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1
; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i64 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i64
; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i64 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i64
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
Show All 14 Lines
; ;
; X64_1LD-LABEL: @cmp_eq10( ; X64_1LD-LABEL: @cmp_eq10(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq10( ; X64_2LD-LABEL: @cmp_eq10(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i16*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i16*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i64 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i64
; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i64 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i64
; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]] ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]]
; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]] ; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]]
; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0
; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
Show All 14 Lines
; ;
; X64_1LD-LABEL: @cmp_eq11( ; X64_1LD-LABEL: @cmp_eq11(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq11( ; X64_2LD-LABEL: @cmp_eq11(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 3
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
Show All 12 Lines
; ;
; X64_1LD-LABEL: @cmp_eq12( ; X64_1LD-LABEL: @cmp_eq12(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq12( ; X64_2LD-LABEL: @cmp_eq12(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i32*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i32*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = zext i32 [[TMP10]] to i64 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i32 [[TMP10]] to i64
; X64_2LD-NEXT: [[TMP13:%.*]] = zext i32 [[TMP11]] to i64 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i32 [[TMP11]] to i64
; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]] ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]]
; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]] ; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]]
; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0
; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
Show All 14 Lines
; ;
; X64_1LD-LABEL: @cmp_eq13( ; X64_1LD-LABEL: @cmp_eq13(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 5 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 5
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq13( ; X64_2LD-LABEL: @cmp_eq13(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 5 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 5
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
Show All 12 Lines
; ;
; X64_1LD-LABEL: @cmp_eq14( ; X64_1LD-LABEL: @cmp_eq14(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 6 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 6
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq14( ; X64_2LD-LABEL: @cmp_eq14(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 6 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 6
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
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; ;
; X64_1LD-LABEL: @cmp_eq15( ; X64_1LD-LABEL: @cmp_eq15(
; X64_1LD-NEXT: br label [[LOADBB:%.*]] ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
; X64_1LD: res_block: ; X64_1LD: res_block:
; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
; X64_1LD: loadbb: ; X64_1LD: loadbb:
; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]] ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
; X64_1LD: loadbb1: ; X64_1LD: loadbb1:
; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 7 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 7
; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7
; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_1LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]] ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
; X64_1LD: endblock: ; X64_1LD: endblock:
; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_1LD-NEXT: ret i32 [[CONV]] ; X64_1LD-NEXT: ret i32 [[CONV]]
; ;
; X64_2LD-LABEL: @cmp_eq15( ; X64_2LD-LABEL: @cmp_eq15(
; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* ; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* ; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 1
; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]] ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 1
; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 7 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 7
; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7
; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64* ; X64_2LD-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP6]] to i64*
; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64* ; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP7]] to i64*
; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 1
; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]] ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 1
; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]] ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64_2LD-NEXT: ret i32 [[CONV]] ; X64_2LD-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 15) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 15)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
define i32 @cmp_eq16(i8* nocapture readonly %x, i8* nocapture readonly %y) { define i32 @cmp_eq16(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X32-LABEL: @cmp_eq16( ; X32-LABEL: @cmp_eq16(
; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16) ; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16)
; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0 ; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X32-NEXT: ret i32 [[CONV]] ; X32-NEXT: ret i32 [[CONV]]
; ;
; X64-LABEL: @cmp_eq16( ; X64-LABEL: @cmp_eq16(
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* ; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*
; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* ; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*
; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]] ; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 1
; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]] ; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 1
; X64-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]] ; X64-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]]
; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; X64-NEXT: ret i32 [[CONV]] ; X64-NEXT: ret i32 [[CONV]]
; ;
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }