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Differential D74993

[AArch64] SVE implies fullfp16
ClosedPublic

Authored by efriedma on Feb 21 2020, 3:33 PM.

Details

Reviewers
sdesmalen
cameron.mcinally
Commits
rG248eaff82372: [AArch64] SVE implies fullfp16
Summary

This is explicitly guaranteed in ARMARM. And it makes reasoning about vectors easier: we can assume that if a vector operation is legal, the corresponding scalar operation is also legal.

Diff Detail

Event Timeline

efriedma created this revision.Feb 21 2020, 3:33 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 21 2020, 3:33 PM
Herald added subscribers: hiraditya, kristof.beyls, tschuett. · View Herald Transcript
cameron.mcinally accepted this revision.Feb 22 2020, 9:08 AM

LGTM

This revision is now accepted and ready to land.Feb 22 2020, 9:08 AM
Closed by commit rG248eaff82372: [AArch64] SVE implies fullfp16 (authored by efriedma). · Explain WhyFeb 24 2020, 5:22 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
AArch64/
2 lines
test/
CodeGen/
AArch64/
2 lines

Diff 246350

llvm/lib/Target/AArch64/AArch64.td

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// UAO PState // UAO PState
def FeaturePsUAO : SubtargetFeature< "uaops", "HasPsUAO", "true", def FeaturePsUAO : SubtargetFeature< "uaops", "HasPsUAO", "true",
"Enable v8.2 UAO PState">; "Enable v8.2 UAO PState">;
def FeatureCCPP : SubtargetFeature<"ccpp", "HasCCPP", def FeatureCCPP : SubtargetFeature<"ccpp", "HasCCPP",
"true", "Enable v8.2 data Cache Clean to Point of Persistence" >; "true", "Enable v8.2 data Cache Clean to Point of Persistence" >;
def FeatureSVE : SubtargetFeature<"sve", "HasSVE", "true", def FeatureSVE : SubtargetFeature<"sve", "HasSVE", "true",
"Enable Scalable Vector Extension (SVE) instructions">; "Enable Scalable Vector Extension (SVE) instructions", [FeatureFullFP16]>;
def FeatureSVE2 : SubtargetFeature<"sve2", "HasSVE2", "true", def FeatureSVE2 : SubtargetFeature<"sve2", "HasSVE2", "true",
"Enable Scalable Vector Extension 2 (SVE2) instructions", [FeatureSVE]>; "Enable Scalable Vector Extension 2 (SVE2) instructions", [FeatureSVE]>;
def FeatureSVE2AES : SubtargetFeature<"sve2-aes", "HasSVE2AES", "true", def FeatureSVE2AES : SubtargetFeature<"sve2-aes", "HasSVE2AES", "true",
"Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>; "Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>;
def FeatureSVE2SM4 : SubtargetFeature<"sve2-sm4", "HasSVE2SM4", "true", def FeatureSVE2SM4 : SubtargetFeature<"sve2-sm4", "HasSVE2SM4", "true",
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llvm/test/CodeGen/AArch64/sve-vector-splat.ll

; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+fullfp16 < %s | FileCheck %s ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
;; Splats of legal integer vector types ;; Splats of legal integer vector types
define <vscale x 16 x i8> @sve_splat_16xi8(i8 %val) { define <vscale x 16 x i8> @sve_splat_16xi8(i8 %val) {
; CHECK-LABEL: @sve_splat_16xi8 ; CHECK-LABEL: @sve_splat_16xi8
; CHECK: mov z0.b, w0 ; CHECK: mov z0.b, w0
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%ins = insertelement <vscale x 16 x i8> undef, i8 %val, i32 0 %ins = insertelement <vscale x 16 x i8> undef, i8 %val, i32 0
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