[AArch64][FPenv] Update chain of int to fp conversion

[dnsampaio]

Summary

When using strict fp, it is required to update the
chain when performing integer type promotion of a
operand to a integer to floating point conversion.

[john.brawn]

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

1244–1245

Instead of setting this per-opcode in the switch, it would be simpler to do

bool IsStrict = N->isStrictFPOpcode()

and then use IsStrict to decide if there's another result. This is also more similar to how we handle strict opcodes elsewhere in legalization.

llvm/test/CodeGen/AArch64/strict-fp-int-promote.mir

67 ↗

(On Diff #244596)

It would be good to have a test of uitfp as well. Also, is there any specific reason this is a .mir test instead of a .ll test?

[dnsampaio]

Changes requested: IR test, chain changed depending on isStrictFPOpcode, signed and unsigned tests

[craig.topper]

LGTM

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

 
 /// PromoteIntegerOperand - This method is called when the specified operand of
 /// the specified node is found to need promotion.  At this point, all of the
 /// result types of the node are known to be legal, but other operands of the
 /// node may need promotion or expansion as well as the specified one.
 bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   LLVM_DEBUG(dbgs() << "Promote integer operand: "; N->dump(&DAG);
              dbgs() << "\n");
   SDValue Res = SDValue();
-
   if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
     LLVM_DEBUG(dbgs() << "Node has been custom lowered, done\n");
     return false;
   }
 
   switch (N->getOpcode()) {
     default:
   #ifndef NDEBUG
     dbgs() << "PromoteIntegerOperand Op #" << OpNo << ": ";
bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   // If the result is null, the sub-method took care of registering results etc.
   if (!Res.getNode()) return false;
 
   // If the result is N, the sub-method updated N in place.  Tell the legalizer
   // core about this.
   if (Res.getNode() == N)
     return true;
 
-  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
+  const bool IsStrictFp = N->isStrictFPOpcode();
+  assert(Res.getValueType() == N->getValueType(0) &&
+         N->getNumValues() == (IsStrictFp ? 2 : 1) &&
          "Invalid operand expansion");
+  LLVM_DEBUG(dbgs() << "Replacing: "; N->dump(&DAG); dbgs() << "     with: ";
+             Res.dump());
 
   ReplaceValueWith(SDValue(N, 0), Res);
+  if (IsStrictFp)
+    ReplaceValueWith(SDValue(N, 1), SDValue(Res.getNode(), 1));
+
   return false;
 }
 
 /// PromoteSetCCOperands - Promote the operands of a comparison.  This code is
 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
 void DAGTypeLegalizer::PromoteSetCCOperands(SDValue &NewLHS,SDValue &NewRHS,
                                             ISD::CondCode CCCode) {
   // We have to insert explicit sign or zero extends. Note that we could

llvm/test/CodeGen/AArch64/strict-fp-int-promote.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O0 -o - %s | FileCheck %s
+; RUN: llc -O3 -o - %s | FileCheck %s --check-prefix=SUBOPTIMAL
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-arm-none-eabi"
+
+declare float @llvm.experimental.constrained.sitofp.f32.i32(i32, metadata, metadata)
+declare float @llvm.experimental.constrained.sitofp.f32.i16(i16, metadata, metadata)
+declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
+declare float @llvm.experimental.constrained.uitofp.f32.i16(i16, metadata, metadata)
+
+define i32 @test() #0 {
+; CHECK-LABEL: test:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #1
+; CHECK-NEXT:    scvtf s0, w8
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    cset w0, eq
+; CHECK-NEXT:    ret
+;
+; SUBOPTIMAL-LABEL: test:
+; SUBOPTIMAL:       // %bb.0: // %entry
+; SUBOPTIMAL-NEXT:    mov w8, #1
+; SUBOPTIMAL-NEXT:    scvtf s0, w8
+; SUBOPTIMAL-NEXT:    mov w8, #1
+; SUBOPTIMAL-NEXT:    scvtf s1, w8
+; SUBOPTIMAL-NEXT:    fcmp s0, s1
+; SUBOPTIMAL-NEXT:    cset w8, eq
+; SUBOPTIMAL-NEXT:    and w0, w8, #0x1
+; SUBOPTIMAL-NEXT:    ret
+entry:
+  %conv = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 1, metadata !"round.tonearest", metadata !"fpexcept.strict")
+  %conv1 = call float @llvm.experimental.constrained.sitofp.f32.i16(i16 1, metadata !"round.tonearest", metadata !"fpexcept.strict")
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %conv, float %conv1, metadata !"oeq", metadata !"fpexcept.strict")
+  %conv2 = zext i1 %cmp to i32
+  ret i32 %conv2
+}
+
+define i32 @test2() #0 {
+; CHECK-LABEL: test2:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #1
+; CHECK-NEXT:    scvtf s0, w8
+; CHECK-NEXT:    ucvtf s1, w8
+; CHECK-NEXT:    fcmp s0, s1
+; CHECK-NEXT:    cset w0, eq
+; CHECK-NEXT:    ret
+;
+; SUBOPTIMAL-LABEL: test2:
+; SUBOPTIMAL:       // %bb.0: // %entry
+; SUBOPTIMAL-NEXT:    mov w8, #1
+; SUBOPTIMAL-NEXT:    scvtf s0, w8
+; SUBOPTIMAL-NEXT:    mov w8, #1
+; SUBOPTIMAL-NEXT:    ucvtf s1, w8
+; SUBOPTIMAL-NEXT:    fcmp s0, s1
+; SUBOPTIMAL-NEXT:    cset w8, eq
+; SUBOPTIMAL-NEXT:    and w0, w8, #0x1
+; SUBOPTIMAL-NEXT:    ret
+entry:
+  %conv = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 1, metadata !"round.tonearest", metadata !"fpexcept.strict")
+  %conv1 = call float @llvm.experimental.constrained.uitofp.f32.i16(i16 1, metadata !"round.tonearest", metadata !"fpexcept.strict")
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %conv, float %conv1, metadata !"oeq", metadata !"fpexcept.strict")
+  %conv2 = zext i1 %cmp to i32
+  ret i32 %conv2
+}
+
+attributes #0 = { noinline optnone }