Lowering to LLVM IR was restricted to float/double.
This CL also adds the integral values.
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[mlir][VectorOps] Generalized vector.print to i32/i64 ClosedPublic Authored by aartbik on Feb 6 2020, 4:13 PM.
Details Summary Lowering to LLVM IR was restricted to float/double.
Diff Detail
Event TimelineThis revision is now accepted and ready to land.Feb 7 2020, 4:59 AM Closed by commit rGe52414b1ae46: [mlir][VectorOps] Generalized vector.print to i32/i64 (authored by aartbik). · Explain WhyFeb 7 2020, 9:31 AM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 243195 mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
mlir/test/mlir-cpu-runner/mlir_runner_utils.cpp
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Nit: let's drop the arg[0-9]+ pattern and just use .*, we don't guarantee anything on SSA names