Don't mark MIPS TRAP as isTerminator

[arichardson]

Summary

This was causing machine verifier errors when compiling libunwind.
I am not 100% certain the flags are correct, I simply copied the flags
that AArch64 and X86 use.

[merge_guards_bot]

Unit tests: fail. 62293 tests passed, 1 failed and 834 were skipped.

failed: libc++.std/thread/thread_mutex/thread_mutex_requirements/thread_mutex_requirements_mutex/thread_mutex_recursive/try_lock.pass.cpp

clang-tidy: pass.

clang-format: pass.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

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[atanasyan]

LGTM
Thanks

llvm/lib/Target/Mips/MipsInstrInfo.td

class MTC3OP<string asmstr, RegisterOperand RO, RegisterOperand RD,
   InstSE<(outs RO:$rd), (ins RD:$rt, uimm3:$sel),
          !strconcat(asmstr, "\t$rt, $rd, $sel"), [], itin, FrmFR> {
   let BaseOpcode = asmstr;
 }
 
 class TrapBase<Instruction RealInst>
   : PseudoSE<(outs), (ins), [(trap)], II_TRAP>,
     PseudoInstExpansion<(RealInst 0, 0)> {
-  let isBarrier = 1;
-  let isTerminator = 1;
+  let mayStore = 0;
+  let mayLoad = 0;
+  let hasSideEffects = 1;
+  let isTrap = 1;
   let isCodeGenOnly = 1;
-  let isCTI = 1;
 }
 
 //===----------------------------------------------------------------------===//
 // Pseudo instructions
 //===----------------------------------------------------------------------===//
 
 // Return RA.
 let isReturn=1, isTerminator=1, isBarrier=1, hasCtrlDep=1, isCTI=1 in {

llvm/test/CodeGen/Mips/call-after-trap.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; Previously a call to @llvm.trap() with following code would cause machine
+; verifier issues on MIPS (as TRAP was marked as being a terminator).
+; This compiles fine on other architectures, so check we do the same for MIPS.
+; RUN: llc -mtriple=mips64-unknown-freebsd -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s
+
+
+declare void @llvm.trap() #0
+declare void @widget() #1
+define hidden void @eggs() #1 {
+; CHECK-LABEL: eggs:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    daddiu $sp, $sp, -16
+; CHECK-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; CHECK-NEXT:    sd $gp, 0($sp) # 8-byte Folded Spill
+; CHECK-NEXT:    lui $1, %hi(%neg(%gp_rel(eggs)))
+; CHECK-NEXT:    daddu $1, $1, $25
+; CHECK-NEXT:    daddiu $gp, $1, %lo(%neg(%gp_rel(eggs)))
+; CHECK-NEXT:    break
+; CHECK-NEXT:    ld $25, %call16(widget)($gp)
+; CHECK-NEXT:    .reloc .Ltmp0, R_MIPS_JALR, widget
+; CHECK-NEXT:  .Ltmp0:
+; CHECK-NEXT:    jalr $25
+; CHECK-NEXT:    nop
+entry:
+  call void @llvm.trap()
+  call void @widget() #2
+  unreachable
+}
+
+attributes #0 = { cold noreturn nounwind }
+attributes #1 = { nounwind "use-soft-float"="true" }
+attributes #2 = { noreturn }