[WebAssembly] Track frame registers through VReg and local allocation

[dschuff]

Summary

This change has 2 components:

Target-independent: add a method getDwarfFrameBase to TargetFrameLowering. It
describes how the Dwarf frame base will be encoded. That can be a register (the
default), the CFA (which replaces NVPTX-specific logic in DwarfCompileUnit), or
a DW_OP_WASM_location descriptr.

WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return the
correct virtual register instead of FP32/SP32 after WebAssemblyReplacePhysRegs
has run. Make WebAssemblyExplicitLocals store the local it allocates for the
frame register. Use this local information to implement getDwarfFrameBase

The result is that the DW_AT_frame_base attribute is correctly encoded for each
subprogram, and each param and local variable has a correct DW_AT_location that
uses DW_OP_fbreg to refer to the frame base.

[dschuff]

Oops, this is just the diff from D71681 (which was committed as rG3a05c3969c18 and reverted), but not the whole patch.
I'll reland the whole thing together, but if @yurydelendik or @sunfish have comments I'm happy to hear them.

The previous patch was reverted because exempting the frame pointer register from LIS.splitSeparateComponents() causes the MachineInstrVerifier to complain whenever there is interesting modification of the stack pointer in the middle of the function (it basically enforces that the range has in fact been split). Those are the same cases where we can't just use a single DW_AT_frame_base for the whole function (we'll probably need CFI), so our debug info is basically just incorrect for those cases. But with this code we don't fail the verifier. The behavior is the same otherwise.

The modifications to the frame pointer also get stackified when this happens (as intended), so assuming we want to keep doing that, we'll have to update the CFI info every time we modify those values. That logic may actually be similar to what we need to do for optimized debug info (e.g. when we have DEBUG_VALUEs referring to those stackified registers).

[merge_guards_bot]

Unit tests: pass. 61934 tests passed, 0 failed and 783 were skipped.

clang-tidy: unknown.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[dschuff]

This was (re)landed as rGff171acf8

llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp

 /// Later, after coalescing, tail duplication, and other optimizations, it's
 /// more common to see registers with multiple unrelated defs. This pass
 /// updates LiveIntervals to distribute the value numbers across separate
 /// LiveIntervals.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "WebAssembly.h"
 #include "WebAssemblySubtarget.h"
+#include "WebAssemblyMachineFunctionInfo.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(
 
   assert(MRI.tracksLiveness() && "OptimizeLiveIntervals expects liveness");
 
   // Split multiple-VN LiveIntervals into multiple LiveIntervals.
   SmallVector<LiveInterval *, 4> SplitLIs;
   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
     unsigned Reg = Register::index2VirtReg(I);
     auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
-    if (MRI.reg_nodbg_empty(Reg) || Reg == TRI.getFrameRegister(MF))
+
+    if (MRI.reg_nodbg_empty(Reg))
       continue;
 
     LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
+    if (Reg == TRI.getFrameRegister(MF) && SplitLIs.size() > 0) {
+      // The live interval for the frame register was split, resulting in a new
+      // VReg. For now we only support debug info output for a single frame base
+      // value for the function, so just use the last one. It will certainly be
+      // wrong for some part of the function, but until we are able to track
+      // values through live-range splitting and stackification, it will have to
+      // do.
+      MF.getInfo<WebAssemblyFunctionInfo>()->setFrameBaseVreg(SplitLIs.back()->reg);
+    }
     SplitLIs.clear();
   }
 
   // In PrepareForLiveIntervals, we conservatively inserted IMPLICIT_DEF
   // instructions to satisfy LiveIntervals' requirement that all uses be
   // dominated by defs. Now that LiveIntervals has computed which of these
   // defs are actually needed and which are dead, remove the dead ones.
   for (auto MII = MF.begin()->begin(), MIE = MF.begin()->end(); MII != MIE;) {
     MachineInstr *MI = &*MII++;
     if (MI->isImplicitDef() && MI->getOperand(0).isDead()) {
       LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg());
       LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot());
       LIS.RemoveMachineInstrFromMaps(*MI);
       MI->eraseFromParent();
     }
   }
 
-  return false;
+  return true;
 }