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Differential D72845

AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
ClosedPublic

Authored by arsenm on Jan 16 2020, 7:09 AM.

Details

Reviewers
rampitec
vpykhtin
Summary

There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.

Diff Detail

Revision Contents

PathSize
llvm/
lib/
Transforms/
InstCombine/
15 lines
test/
Transforms/
InstCombine/
AMDGPU/
80 lines

Diff 238490

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

Show First 20 Lines • Show All 3,953 Lines • ▼ Show 20 Lines if (BC->isZeroValue() ||
BM->getZExtValue() != 0xF || BM->getZExtValue() != 0xF ||
isa<UndefValue>(Old)) isa<UndefValue>(Old))
break; break;
// If bound_ctrl = 1, row mask = bank mask = 0xf we can omit old value. // If bound_ctrl = 1, row mask = bank mask = 0xf we can omit old value.
II->setOperand(0, UndefValue::get(Old->getType())); II->setOperand(0, UndefValue::get(Old->getType()));
return II; return II;
} }
case Intrinsic::amdgcn_permlane16:
case Intrinsic::amdgcn_permlanex16: {
// Discard vdst_in if it's not going to be read.
Value *VDstIn = II->getArgOperand(0);
if (isa<UndefValue>(VDstIn))
break;
ConstantInt *FetchInvalid = cast<ConstantInt>(II->getArgOperand(4));
ConstantInt *BoundCtrl = cast<ConstantInt>(II->getArgOperand(5));
if (!FetchInvalid->getZExtValue() && !BoundCtrl->getZExtValue())
break;
II->setArgOperand(0, UndefValue::get(VDstIn->getType()));
return II;
}
case Intrinsic::amdgcn_readfirstlane: case Intrinsic::amdgcn_readfirstlane:
case Intrinsic::amdgcn_readlane: { case Intrinsic::amdgcn_readlane: {
// A constant value is trivially uniform. // A constant value is trivially uniform.
if (Constant *C = dyn_cast<Constant>(II->getArgOperand(0))) if (Constant *C = dyn_cast<Constant>(II->getArgOperand(0)))
return replaceInstUsesWith(*II, C); return replaceInstUsesWith(*II, C);
// The rest of these may not be safe if the exec may not be the same between // The rest of these may not be safe if the exec may not be the same between
// the def and use. // the def and use.
▲ Show 20 Lines • Show All 1,004 Lines • Show Last 20 Lines

llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

Show First 20 Lines • Show All 2,649 Lines • ▼ Show 20 Lines
; CHECK-NEXT: store i32 [[TMP0]], i32 addrspace(1)* [[OUT:%.*]], align 4 ; CHECK-NEXT: store i32 [[TMP0]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%tmp0 = call i32 @llvm.amdgcn.update.dpp.i32(i32 undef, i32 %in1, i32 4, i32 15, i32 15, i1 1) %tmp0 = call i32 @llvm.amdgcn.update.dpp.i32(i32 undef, i32 %in1, i32 4, i32 15, i32 15, i1 1)
store i32 %tmp0, i32 addrspace(1)* %out store i32 %tmp0, i32 addrspace(1)* %out
ret void ret void
} }
; CHECK: attributes [[CONVERGENT]] = { convergent }
; --------------------------------------------------------------------
; llvm.amdgcn.permlane16
; --------------------------------------------------------------------
declare i32 @llvm.amdgcn.permlane16(i32, i32, i32, i32, i1 immarg, i1 immarg)
define amdgpu_kernel void @permlane16(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlane16(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlane16(i32 12345, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 false, i1 false)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlane16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store i32 %res, i32 addrspace(1)* %out
ret void
}
define amdgpu_kernel void @permlane16_bound_ctrl(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlane16_bound_ctrl(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlane16(i32 undef, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 false, i1 true)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlane16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
store i32 %res, i32 addrspace(1)* %out
ret void
}
define amdgpu_kernel void @permlane16_fetch_invalid_bound_ctrl(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlane16_fetch_invalid_bound_ctrl(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlane16(i32 undef, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 true, i1 true)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlane16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
store i32 %res, i32 addrspace(1)* %out
ret void
}
; --------------------------------------------------------------------
; llvm.amdgcn.permlanex16
; --------------------------------------------------------------------
declare i32 @llvm.amdgcn.permlanex16(i32, i32, i32, i32, i1 immarg, i1 immarg)
define amdgpu_kernel void @permlanex16(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlanex16(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlanex16(i32 12345, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 false, i1 false)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlanex16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store i32 %res, i32 addrspace(1)* %out
ret void
}
define amdgpu_kernel void @permlanex16_bound_ctrl(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlanex16_bound_ctrl(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlanex16(i32 undef, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 false, i1 true)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlanex16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
store i32 %res, i32 addrspace(1)* %out
ret void
}
define amdgpu_kernel void @permlanex16_fetch_invalid_bound_ctrl(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) {
; CHECK-LABEL: @permlanex16_fetch_invalid_bound_ctrl(
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.amdgcn.permlanex16(i32 undef, i32 [[SRC0:%.*]], i32 [[SRC1:%.*]], i32 [[SRC2:%.*]], i1 true, i1 true)
; CHECK-NEXT: store i32 [[RES]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
%res = call i32 @llvm.amdgcn.permlanex16(i32 12345, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
store i32 %res, i32 addrspace(1)* %out
ret void
}
; CHECK: attributes [[CONVERGENT]] = { convergent }