[ARM] Specify address mode of pseudo instruction LOADDUAL

[vhscampos]

Summary

LOADDUAL did not have an address mode specified. As such, places that
were expecting one were failing, e.g. in ARMFrameLowering when LOADDUAL
was used to reference a stack frame.

This patch adds an Address Mode to the LOADDUAL pseudoinstruction in its
TableGen definition.

[efriedma]

Code looks okay, but please add a testcase to test/CodeGen/ARM.

llvm/lib/Target/ARM/ARMInstrInfo.td

let mayLoad = 1, hasSideEffects = 0, hasExtraDefRegAllocReq = 1 in {
   def LDRD : AI3ld<0b1101, 0, (outs GPR:$Rt, GPR:$Rt2), (ins addrmode3:$addr),
                    LdMiscFrm, IIC_iLoad_d_r, "ldrd", "\t$Rt, $Rt2, $addr", []>,
              Requires<[IsARM, HasV5TE]>;
 }
 
 let mayLoad = 1, hasSideEffects = 0, hasNoSchedulingInfo = 1 in {
 def LOADDUAL : ARMPseudoInst<(outs GPRPairOp:$Rt), (ins addrmode3:$addr),
                              64, IIC_iLoad_d_r, []>,
-               Requires<[IsARM, HasV5TE]>;
+               Requires<[IsARM, HasV5TE]> {
+  let AM = AddrMode3;
+}
 }
 
 def LDA : AIldracq<0b00, (outs GPR:$Rt), (ins addr_offset_none:$addr),
                     NoItinerary, "lda", "\t$Rt, $addr", []>;
 def LDAB : AIldracq<0b10, (outs GPR:$Rt), (ins addr_offset_none:$addr),
                     NoItinerary, "ldab", "\t$Rt, $addr", []>;
 def LDAH : AIldracq<0b11, (outs GPR:$Rt), (ins addr_offset_none:$addr),
                     NoItinerary, "ldah", "\t$Rt, $addr", []>;