[RISCV] Add assembly mnemonic spell checking

[simoncook]

Summary

This allows the assembler to suggest alternative assembly mnemonics when
an invalid one has been provided.

[asb]

Compared this to commits that introduced assembly mnemonic spellchecking for other backends, and it looks good to me. Thanks Simon!

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

void addFRMArgOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
     Inst.addOperand(MCOperand::createImm(getRoundingMode()));
   }
 };
 } // end anonymous namespace.
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
+#define GET_MNEMONIC_SPELL_CHECKER
 #include "RISCVGenAsmMatcher.inc"
 
 static Register convertFPR64ToFPR32(Register Reg) {
   assert(Reg >= RISCV::F0_D && Reg <= RISCV::F31_D && "Invalid register");
   return Reg - RISCV::F0_D + RISCV::F0_F;
 }
 
 unsigned RISCVAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,

 
 bool RISCVAsmParser::generateImmOutOfRangeError(
     OperandVector &Operands, uint64_t ErrorInfo, int64_t Lower, int64_t Upper,
     Twine Msg = "immediate must be an integer in the range") {
   SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc();
   return Error(ErrorLoc, Msg + " [" + Twine(Lower) + ", " + Twine(Upper) + "]");
 }
 
+static std::string RISCVMnemonicSpellCheck(StringRef S,
+                                          const FeatureBitset &FBS,
+                                          unsigned VariantID = 0);
+
 bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                              OperandVector &Operands,
                                              MCStreamer &Out,
                                              uint64_t &ErrorInfo,
                                              bool MatchingInlineAsm) {
   MCInst Inst;
 
   auto Result =
     MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
   switch (Result) {
   default:
     break;
   case Match_Success:
     return processInstruction(Inst, IDLoc, Operands, Out);
   case Match_MissingFeature:
     return Error(IDLoc, "instruction use requires an option to be enabled");
-  case Match_MnemonicFail:
-    return Error(IDLoc, "unrecognized instruction mnemonic");
+  case Match_MnemonicFail: {
+    FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
+    std::string Suggestion = RISCVMnemonicSpellCheck(
+      ((RISCVOperand &)*Operands[0]).getToken(), FBS);
+    return Error(IDLoc, "unrecognized instruction mnemonic" + Suggestion);
+  }
   case Match_InvalidOperand: {
     SMLoc ErrorLoc = IDLoc;
     if (ErrorInfo != ~0U) {
       if (ErrorInfo >= Operands.size())
         return Error(ErrorLoc, "too few operands for instruction");
 
       ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc();
       if (ErrorLoc == SMLoc())

llvm/test/MC/RISCV/invalid-instruction-spellcheck.s

+# RUN: not llvm-mc -triple=riscv32 < %s 2>&1 \
+# RUN:         | FileCheck -check-prefixes=CHECK,CHECK-RV32,CHECK-RV32I %s
+# RUN: not llvm-mc -triple=riscv64 < %s 2>&1 \
+# RUN:         | FileCheck -check-prefixes=CHECK,CHECK-RV64,CHECK-RV64I %s
+# RUN: not llvm-mc -triple=riscv32 -mattr=+f < %s 2>&1 \
+# RUN:         | FileCheck -check-prefixes=CHECK,CHECK-RV32,CHECK-RV32IF %s
+# RUN: not llvm-mc -triple=riscv64 -mattr=+f < %s 2>&1 \
+# RUN:         | FileCheck -check-prefixes=CHECK,CHECK-RV64,CHECK-RV64IF %s
+
+# Tests for the mnemonic spell checker. Suggestions should only include those
+# which are valid for the current set of features
+
+ad x1, x1, x1
+# CHECK-RV32: did you mean: add, addi, and, andi, la
+# CHECK-RV64: did you mean: add, addi, addw, and, andi, la, ld, sd
+# CHECK-NEXT: ad x1, x1, x1
+
+fl ft0, 0(sp)
+# CHECK-RV32I: did you mean: la, lb, lh, li, lw
+# CHECK-RV32IF: did you mean: flw, la, lb, lh, li, lw
+# CHECK-RV64I: did you mean: la, lb, ld, lh, li, lw
+# CHECK-RV64IF: did you mean: flw, la, lb, ld, lh, li, lw
+# CHECK-NEXT: fl ft0, 0(sp)
+
+addd x1, x1, x1
+# CHECK-RV32: did you mean: add, addi
+# CHECK-RV64: did you mean: add, addi, addw
+# CHECK-NEXT: addd x1, x1, x1
+
+vm x0, x0
+# CHECK: did you mean: mv
+# CHECK-NEXT: vm x0, x0