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[AMDGPU] Fold AGPR reg_sequence initializers
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Authored by rampitec on Oct 24 2019, 3:16 PM.

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rampitec created this revision.Oct 24 2019, 3:16 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 24 2019, 3:16 PM
arsenm added inline comments.Oct 24 2019, 3:40 PM
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
691

const reference and no auto

697

You can construct a MachineInstrBuilder for the existing instruction to replace the addOperands below with the less verbose versions

699

I think 32 is a bit big for a small set size

733

Why is this checking Def->getParent()? Why is an instruction under consideration that isn't inserted in a block?

750

.add()

rampitec marked 6 inline comments as done.Oct 24 2019, 4:11 PM
rampitec added inline comments.
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
699

32 is a maximum register tuple which can come here.

733

It's a leftover from a check that was not needed ;) Thanks.

rampitec updated this revision to Diff 226351.Oct 24 2019, 4:12 PM
rampitec marked an inline comment as done.

Addressed review comments.

This revision is now accepted and ready to land.Oct 25 2019, 11:35 AM
This revision was automatically updated to reflect the committed changes.