This is an archive of the discontinued LLVM Phabricator instance.

Differential D69037

[ARM][MVE] Change VPST to use, not def, VPR
ClosedPublic

Authored by samparker on Oct 16 2019, 7:09 AM.

Details

Reviewers
simon_tatham
dmgreen
SjoerdMeijer
Commits
rG3ff961cabd85: [ARM][MVE] Change VPST to use, not def, VPR
rL375087: [ARM][MVE] Change VPST to use, not def, VPR
Summary

Unlike VPT, VPST just uses the current value of VPR.P0.

Diff Detail

Event Timeline

samparker created this revision.Oct 16 2019, 7:09 AM
Herald added a subscriber: kristof.beyls. · View Herald TranscriptOct 16 2019, 7:09 AM
dmgreen accepted this revision.Oct 16 2019, 11:08 AM

Yeah, seems sensible. LGTM.

This revision is now accepted and ready to land.Oct 16 2019, 11:08 AM
Closed by commit rG3ff961cabd85: [ARM][MVE] Change VPST to use, not def, VPR (authored by samparker). · Explain WhyOct 17 2019, 1:46 AM
This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptOct 17 2019, 1:46 AM
Herald added a subscriber: hiraditya. · View Herald Transcript

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
2 lines
test/
CodeGen/
Thumb2/
LowOverheadLoops/
6 lines
8 lines
204 lines
6 lines
8 lines
12 lines
18 lines
16 lines
12 lines
16 lines
20 lines
42 lines

Diff 225376

llvm/lib/Target/ARM/ARMInstrMVE.td

Show First 20 Lines • Show All 4,785 Lines • ▼ Show 20 Linesdef MVE_VPST : MVE_MI<(outs ), (ins vpt_mask:$Mk), NoItinerary,
let Inst{22} = Mk{3}; let Inst{22} = Mk{3};
let Inst{21-16} = 0b110001; let Inst{21-16} = 0b110001;
let Inst{15-13} = Mk{2-0}; let Inst{15-13} = Mk{2-0};
let Inst{12-0} = 0b0111101001101; let Inst{12-0} = 0b0111101001101;
let Unpredictable{12} = 0b1; let Unpredictable{12} = 0b1;
let Unpredictable{7} = 0b1; let Unpredictable{7} = 0b1;
let Unpredictable{5} = 0b1; let Unpredictable{5} = 0b1;
let Defs = [VPR]; let Uses = [VPR];
let validForTailPredication = 1; let validForTailPredication = 1;
} }
def MVE_VPSEL : MVE_p<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm), NoItinerary, def MVE_VPSEL : MVE_p<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm), NoItinerary,
"vpsel", "", "$Qd, $Qn, $Qm", vpred_n, "", []> { "vpsel", "", "$Qd, $Qn, $Qm", vpred_n, "", []> {
bits<4> Qn; bits<4> Qn;
bits<4> Qd; bits<4> Qd;
bits<4> Qm; bits<4> Qm;
▲ Show 20 Lines • Show All 634 Lines • Show Last 20 Lines

llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll

Show All 38 Lines
; CHECK-NEXT: adds r6, r3, #3 ; CHECK-NEXT: adds r6, r3, #3
; CHECK-NEXT: bic r6, r6, #3 ; CHECK-NEXT: bic r6, r6, #3
; CHECK-NEXT: subs r6, #4 ; CHECK-NEXT: subs r6, #4
; CHECK-NEXT: add.w lr, r12, r6, lsr #2 ; CHECK-NEXT: add.w lr, r12, r6, lsr #2
; CHECK-NEXT: dls lr, lr ; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB0_5: @ %vector.body ; CHECK-NEXT: .LBB0_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r3 ; CHECK-NEXT: vctp.32 r3
; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: vpstt ; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q0, [r1] ; CHECK-NEXT: vldrwt.u32 q0, [r1]
; CHECK-NEXT: vldrwt.u32 q1, [r2] ; CHECK-NEXT: vldrwt.u32 q1, [r2]
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: vmul.f32 q0, q1, q0 ; CHECK-NEXT: vmul.f32 q0, q1, q0
; CHECK-NEXT: vpst ; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r0] ; CHECK-NEXT: vstrwt.32 q0, [r0]
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r2, #16 ; CHECK-NEXT: adds r2, #16
; CHECK-NEXT: adds r0, #16 ; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: le lr, .LBB0_5 ; CHECK-NEXT: le lr, .LBB0_5
; CHECK-NEXT: b .LBB0_11 ; CHECK-NEXT: b .LBB0_11
; CHECK-NEXT: .LBB0_6: @ %for.body.preheader.new ; CHECK-NEXT: .LBB0_6: @ %for.body.preheader.new
; CHECK-NEXT: subs r3, r3, r7 ; CHECK-NEXT: subs r3, r3, r7
; CHECK-NEXT: mov r8, r7 ; CHECK-NEXT: mov r8, r7
; CHECK-NEXT: subs r3, #4 ; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: add.w lr, r12, r3, lsr #2 ; CHECK-NEXT: add.w lr, r12, r3, lsr #2
; CHECK-NEXT: movs r3, #0 ; CHECK-NEXT: movs r3, #0
▲ Show 20 Lines • Show All 172 Lines • ▼ Show 20 Lines
; CHECK-NEXT: vmov.i32 q1, #0x0 ; CHECK-NEXT: vmov.i32 q1, #0x0
; CHECK-NEXT: bic r3, r3, #3 ; CHECK-NEXT: bic r3, r3, #3
; CHECK-NEXT: sub.w r12, r3, #4 ; CHECK-NEXT: sub.w r12, r3, #4
; CHECK-NEXT: movs r3, #1 ; CHECK-NEXT: movs r3, #1
; CHECK-NEXT: add.w lr, r3, r12, lsr #2 ; CHECK-NEXT: add.w lr, r3, r12, lsr #2
; CHECK-NEXT: dls lr, lr ; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB1_2: @ %vector.body ; CHECK-NEXT: .LBB1_2: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vpstt ; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q1, [r0] ; CHECK-NEXT: vldrwt.u32 q1, [r0]
; CHECK-NEXT: vldrwt.u32 q2, [r1] ; CHECK-NEXT: vldrwt.u32 q2, [r1]
; CHECK-NEXT: mov r3, r2 ; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: vmul.f32 q1, q2, q1 ; CHECK-NEXT: vmul.f32 q1, q2, q1
; CHECK-NEXT: adds r0, #16 ; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: adds r1, #16 ; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: subs r2, #4 ; CHECK-NEXT: subs r2, #4
▲ Show 20 Lines • Show All 348 Lines • Show Last 20 Lines

llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll

Show First 20 Lines • Show All 353 Lines • ▼ Show 20 Lines
; CHECK-NEXT: bic r3, r3, #3 ; CHECK-NEXT: bic r3, r3, #3
; CHECK-NEXT: sub.w r12, r3, #4 ; CHECK-NEXT: sub.w r12, r3, #4
; CHECK-NEXT: movs r3, #1 ; CHECK-NEXT: movs r3, #1
; CHECK-NEXT: add.w lr, r3, r12, lsr #2 ; CHECK-NEXT: add.w lr, r3, r12, lsr #2
; CHECK-NEXT: dls lr, lr ; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB4_1: @ %vector.body ; CHECK-NEXT: .LBB4_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r2 ; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: vpst ; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q2, [r1] ; CHECK-NEXT: vldrwt.u32 q2, [r1]
; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: adds r1, #16 ; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: subs r2, #4 ; CHECK-NEXT: subs r2, #4
; CHECK-NEXT: vmov q1, q0 ; CHECK-NEXT: vmov q1, q0
; CHECK-NEXT: vmla.u32 q0, q2, r0 ; CHECK-NEXT: vmla.u32 q0, q2, r0
; CHECK-NEXT: le lr, .LBB4_1 ; CHECK-NEXT: le lr, .LBB4_1
; CHECK-NEXT: @ %bb.2: @ %middle.block ; CHECK-NEXT: @ %bb.2: @ %middle.block
; CHECK-NEXT: vctp.32 r3 ; CHECK-NEXT: vctp.32 r3
; CHECK-NEXT: vpsel q0, q0, q1 ; CHECK-NEXT: vpsel q0, q0, q1
▲ Show 20 Lines • Show All 758 Lines • ▼ Show 20 Lines
; CHECK-NEXT: add.w r4, r12, #3 ; CHECK-NEXT: add.w r4, r12, #3
; CHECK-NEXT: bic r4, r4, #3 ; CHECK-NEXT: bic r4, r4, #3
; CHECK-NEXT: subs r4, #4 ; CHECK-NEXT: subs r4, #4
; CHECK-NEXT: add.w lr, lr, r4, lsr #2 ; CHECK-NEXT: add.w lr, lr, r4, lsr #2
; CHECK-NEXT: dls lr, lr ; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB9_5: @ %vector.body ; CHECK-NEXT: .LBB9_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r12 ; CHECK-NEXT: vctp.32 r12
; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: vpstt ; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q0, [r0] ; CHECK-NEXT: vldrwt.u32 q0, [r0]
; CHECK-NEXT: vldrwt.u32 q1, [r1] ; CHECK-NEXT: vldrwt.u32 q1, [r1]
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: vmul.i32 q0, q1, q0 ; CHECK-NEXT: vmul.i32 q0, q1, q0
; CHECK-NEXT: adds r1, #16 ; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: vadd.i32 q0, q0, r2 ; CHECK-NEXT: vadd.i32 q0, q0, r2
; CHECK-NEXT: vpst ; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r3] ; CHECK-NEXT: vstrwt.32 q0, [r3]
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r3, #16 ; CHECK-NEXT: adds r3, #16
; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: le lr, .LBB9_5 ; CHECK-NEXT: le lr, .LBB9_5
; CHECK-NEXT: b .LBB9_11 ; CHECK-NEXT: b .LBB9_11
; CHECK-NEXT: .LBB9_6: @ %for.body.preheader.new ; CHECK-NEXT: .LBB9_6: @ %for.body.preheader.new
; CHECK-NEXT: sub.w r7, r12, r5 ; CHECK-NEXT: sub.w r7, r12, r5
; CHECK-NEXT: mov r10, r5 ; CHECK-NEXT: mov r10, r5
; CHECK-NEXT: subs r7, #4 ; CHECK-NEXT: subs r7, #4
; CHECK-NEXT: movs r4, #0 ; CHECK-NEXT: movs r4, #0
; CHECK-NEXT: mov.w r12, #0 ; CHECK-NEXT: mov.w r12, #0
▲ Show 20 Lines • Show All 185 Lines • Show Last 20 Lines

llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=armv8.1m.main -mattr=+mve -enable-arm-maskedldst=true -disable-mve-tail-predication=false --verify-machineinstrs %s -o - | FileCheck %s ; RUN: llc -mtriple=armv8.1m.main -mattr=+mve -enable-arm-maskedldst=true -disable-mve-tail-predication=false --verify-machineinstrs %s -o - | FileCheck %s
; CHECK-LABEL: mul_reduce_add
; CHECK: dls lr,
; CHECK: [[LOOP:.LBB[0-9_]+]]:
; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
; CHECK: vpstt
; CHECK-NEXT: vldrwt.u32
; CHECK-NEXT: vldrwt.u32
; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
; CHECK: sub{{.*}} [[ELEMS]], #4
; CHECK: le lr, [[LOOP]]
; CHECK: vctp.32 [[ELEMS_OUT]]
; CHECK: vpsel
; CHECK: vaddv.u32 r0
define dso_local i32 @mul_reduce_add(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32 %N) { define dso_local i32 @mul_reduce_add(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32 %N) {
; CHECK-LABEL: mul_reduce_add:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: cmp r2, #0
; CHECK-NEXT: itt eq
; CHECK-NEXT: moveq r0, #0
; CHECK-NEXT: bxeq lr
; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: adds r3, r2, #3
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: bic r3, r3, #3
; CHECK-NEXT: sub.w r12, r3, #4
; CHECK-NEXT: movs r3, #1
; CHECK-NEXT: add.w lr, r3, r12, lsr #2
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB0_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vmov q1, q0
; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vpstt
; CHECK-NEXT: vldrwt.u32 q0, [r0]
; CHECK-NEXT: vldrwt.u32 q2, [r1]
; CHECK-NEXT: mov r3, r2
; CHECK-NEXT: vmul.i32 q0, q2, q0
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: subs r2, #4
; CHECK-NEXT: vadd.i32 q0, q0, q1
; CHECK-NEXT: le lr, .LBB0_1
; CHECK-NEXT: @ %bb.2: @ %middle.block
; CHECK-NEXT: vctp.32 r3
; CHECK-NEXT: vpsel q0, q0, q1
; CHECK-NEXT: vaddv.u32 r0, q0
; CHECK-NEXT: pop {r7, pc}
entry: entry:
%cmp8 = icmp eq i32 %N, 0 %cmp8 = icmp eq i32 %N, 0
br i1 %cmp8, label %for.cond.cleanup, label %vector.ph br i1 %cmp8, label %for.cond.cleanup, label %vector.ph
vector.ph: ; preds = %entry vector.ph: ; preds = %entry
%n.rnd.up = add i32 %N, 3 %n.rnd.up = add i32 %N, 3
%n.vec = and i32 %n.rnd.up, -4 %n.vec = and i32 %n.rnd.up, -4
%trip.count.minus.1 = add i32 %N, -1 %trip.count.minus.1 = add i32 %N, -1
Show All 25 Linesmiddle.block: ; preds = %vector.body
%9 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %8) %9 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %8)
br label %for.cond.cleanup br label %for.cond.cleanup
for.cond.cleanup: ; preds = %middle.block, %entry for.cond.cleanup: ; preds = %middle.block, %entry
%res.0.lcssa = phi i32 [ 0, %entry ], [ %9, %middle.block ] %res.0.lcssa = phi i32 [ 0, %entry ], [ %9, %middle.block ]
ret i32 %res.0.lcssa ret i32 %res.0.lcssa
} }
; CHECK-LABEL: mul_reduce_add_const
; CHECK: dls lr
; CHECK: [[LOOP:.LBB[0-9_]+]]:
; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
; CHECK: vpst
; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r0]
; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
; CHECK: sub{{.*}} [[ELEMS]], #4
; CHECK: le lr, [[LOOP]]
; CHECK: vctp.32 [[ELEMS_OUT]]
; CHECK: vpsel
define dso_local i32 @mul_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) { define dso_local i32 @mul_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) {
; CHECK-LABEL: mul_reduce_add_const:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: cmp r2, #0
; CHECK-NEXT: itt eq
; CHECK-NEXT: moveq r0, #0
; CHECK-NEXT: bxeq lr
; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: adds r1, r2, #3
; CHECK-NEXT: movs r3, #1
; CHECK-NEXT: bic r1, r1, #3
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: subs r1, #4
; CHECK-NEXT: add.w lr, r3, r1, lsr #2
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB1_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: mov r1, r2
; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vmov q1, q0
; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q0, [r0]
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: subs r2, #4
; CHECK-NEXT: vadd.i32 q0, q0, q1
; CHECK-NEXT: le lr, .LBB1_1
; CHECK-NEXT: @ %bb.2: @ %middle.block
; CHECK-NEXT: vctp.32 r1
; CHECK-NEXT: vpsel q0, q0, q1
; CHECK-NEXT: vaddv.u32 r0, q0
; CHECK-NEXT: pop {r7, pc}
entry: entry:
%cmp6 = icmp eq i32 %N, 0 %cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
vector.ph: ; preds = %entry vector.ph: ; preds = %entry
%n.rnd.up = add i32 %N, 3 %n.rnd.up = add i32 %N, 3
%n.vec = and i32 %n.rnd.up, -4 %n.vec = and i32 %n.rnd.up, -4
%trip.count.minus.1 = add i32 %N, -1 %trip.count.minus.1 = add i32 %N, -1
Show All 21 Linesmiddle.block: ; preds = %vector.body
%6 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %5) %6 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %5)
br label %for.cond.cleanup br label %for.cond.cleanup
for.cond.cleanup: ; preds = %middle.block, %entry for.cond.cleanup: ; preds = %middle.block, %entry
%res.0.lcssa = phi i32 [ 0, %entry ], [ %6, %middle.block ] %res.0.lcssa = phi i32 [ 0, %entry ], [ %6, %middle.block ]
ret i32 %res.0.lcssa ret i32 %res.0.lcssa
} }
; CHECK-LABEL: add_reduce_add_const
; CHECK: dls lr, lr
; CHECK: [[LOOP:.LBB[0-9_]+]]:
; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
; CHECK: vpst
; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r0]
; CHECK: mov [[ELEMS_OUT:r[0-9]+]], [[ELEMS]]
; CHECK: sub{{.*}} [[ELEMS]], #4
; CHECK: vadd.i32
; CHECK: le lr, [[LOOP]]
; CHECK: vctp.32 [[ELEMS_OUT]]
; CHECK: vpsel
define dso_local i32 @add_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) { define dso_local i32 @add_reduce_add_const(i32* noalias nocapture readonly %a, i32 %b, i32 %N) {
; CHECK-LABEL: add_reduce_add_const:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: cmp r2, #0
; CHECK-NEXT: itt eq
; CHECK-NEXT: moveq r0, #0
; CHECK-NEXT: bxeq lr
; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: adds r1, r2, #3
; CHECK-NEXT: movs r3, #1
; CHECK-NEXT: bic r1, r1, #3
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: subs r1, #4
; CHECK-NEXT: add.w lr, r3, r1, lsr #2
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB2_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: mov r1, r2
; CHECK-NEXT: vctp.32 r2
; CHECK-NEXT: vmov q1, q0
; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q0, [r0]
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: subs r2, #4
; CHECK-NEXT: vadd.i32 q0, q0, q1
; CHECK-NEXT: le lr, .LBB2_1
; CHECK-NEXT: @ %bb.2: @ %middle.block
; CHECK-NEXT: vctp.32 r1
; CHECK-NEXT: vpsel q0, q0, q1
; CHECK-NEXT: vaddv.u32 r0, q0
; CHECK-NEXT: pop {r7, pc}
entry: entry:
%cmp6 = icmp eq i32 %N, 0 %cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
vector.ph: ; preds = %entry vector.ph: ; preds = %entry
%n.rnd.up = add i32 %N, 3 %n.rnd.up = add i32 %N, 3
%n.vec = and i32 %n.rnd.up, -4 %n.vec = and i32 %n.rnd.up, -4
%trip.count.minus.1 = add i32 %N, -1 %trip.count.minus.1 = add i32 %N, -1
Show All 21 Linesmiddle.block: ; preds = %vector.body
%6 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %5) %6 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %5)
br label %for.cond.cleanup br label %for.cond.cleanup
for.cond.cleanup: ; preds = %middle.block, %entry for.cond.cleanup: ; preds = %middle.block, %entry
%res.0.lcssa = phi i32 [ 0, %entry ], [ %6, %middle.block ] %res.0.lcssa = phi i32 [ 0, %entry ], [ %6, %middle.block ]
ret i32 %res.0.lcssa ret i32 %res.0.lcssa
} }
; CHECK-LABEL: vector_mul_const
; CHECK: dls lr, lr
; CHECK: [[LOOP:.LBB[0-9_]+]]:
; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
; CHECK: sub{{.*}} [[ELEMS]], #4
; CHECK: vpst
; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r1]
; CHECK: vmul.i32
; CHECK: vpst
; CHECK-NEXT: vstrwt.32 q{{.*}}, [r0]
; CHECK: le lr, [[LOOP]]
define dso_local void @vector_mul_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) { define dso_local void @vector_mul_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) {
; CHECK-LABEL: vector_mul_const:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r3, #0
; CHECK-NEXT: it eq
; CHECK-NEXT: popeq {r7, pc}
; CHECK-NEXT: add.w r12, r3, #3
; CHECK-NEXT: mov.w lr, #1
; CHECK-NEXT: bic r12, r12, #3
; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: add.w lr, lr, r12, lsr #2
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB3_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r3
; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q0, [r1]
; CHECK-NEXT: vmul.i32 q0, q0, r2
; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r0]
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: le lr, .LBB3_1
; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc}
entry: entry:
%cmp6 = icmp eq i32 %N, 0 %cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
vector.ph: ; preds = %entry vector.ph: ; preds = %entry
%n.rnd.up = add i32 %N, 3 %n.rnd.up = add i32 %N, 3
%n.vec = and i32 %n.rnd.up, -4 %n.vec = and i32 %n.rnd.up, -4
%trip.count.minus.1 = add i32 %N, -1 %trip.count.minus.1 = add i32 %N, -1
Show All 19 Linesvector.body: ; preds = %vector.body, %vector.ph
%index.next = add i32 %index, 4 %index.next = add i32 %index, 4
%6 = icmp eq i32 %index.next, %n.vec %6 = icmp eq i32 %index.next, %n.vec
br i1 %6, label %for.cond.cleanup, label %vector.body br i1 %6, label %for.cond.cleanup, label %vector.body
for.cond.cleanup: ; preds = %vector.body, %entry for.cond.cleanup: ; preds = %vector.body, %entry
ret void ret void
} }
; CHECK-LABEL: vector_add_const
; CHECK: dls lr, lr
; CHECK: [[LOOP:.LBB[0-9_]+]]:
; CHECK: vctp.32 [[ELEMS:r[0-9]+]]
; CHECK: sub{{.*}} [[ELEMS]], #4
; CHECK: vpst
; CHECK-NEXT: vldrwt.u32 q{{.*}}, [r1]
; CHECK: vadd.i32
; CHECK: vpst
; CHECK-NEXT: vstrwt.32 q{{.*}}, [r0]
; CHECK: le lr, [[LOOP]]
define dso_local void @vector_add_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) { define dso_local void @vector_add_const(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %c, i32 %N) {
; CHECK-LABEL: vector_add_const:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r3, #0
; CHECK-NEXT: it eq
; CHECK-NEXT: popeq {r7, pc}
; CHECK-NEXT: add.w r12, r3, #3
; CHECK-NEXT: mov.w lr, #1
; CHECK-NEXT: bic r12, r12, #3
; CHECK-NEXT: sub.w r12, r12, #4
; CHECK-NEXT: add.w lr, lr, r12, lsr #2
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB4_1: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vctp.32 r3
; CHECK-NEXT: vpst
; CHECK-NEXT: vldrwt.u32 q0, [r1]
; CHECK-NEXT: vadd.i32 q0, q0, r2
; CHECK-NEXT: vpst
; CHECK-NEXT: vstrwt.32 q0, [r0]
; CHECK-NEXT: adds r1, #16
; CHECK-NEXT: adds r0, #16
; CHECK-NEXT: subs r3, #4
; CHECK-NEXT: le lr, .LBB4_1
; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc}
entry: entry:
%cmp6 = icmp eq i32 %N, 0 %cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %for.cond.cleanup, label %vector.ph br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
vector.ph: ; preds = %entry vector.ph: ; preds = %entry
%n.rnd.up = add i32 %N, 3 %n.rnd.up = add i32 %N, 3
%n.vec = and i32 %n.rnd.up, -4 %n.vec = and i32 %n.rnd.up, -4
%trip.count.minus.1 = add i32 %N, -1 %trip.count.minus.1 = add i32 %N, -1
Show All 31 Lines

llvm/test/CodeGen/Thumb2/mve-vpt-block.mir

Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
constants: [] constants: []
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $r0 liveins: $q0, $q1, $q2, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $r0 ; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q0 { ; CHECK: BUNDLE implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q0 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: } ; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
constants: [] constants: []
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $q3, $r0 liveins: $q0, $q1, $q2, $q3, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0 ; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 { ; CHECK: BUNDLE implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: } ; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 ; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1 renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
$q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir

Show First 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
constants: [] constants: []
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $q3, $r0 liveins: $q0, $q1, $q2, $q3, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0 ; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 { ; CHECK: BUNDLE implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
; CHECK: MVE_VPST 1, implicit-def $vpr ; CHECK: MVE_VPST 1, implicit $vpr
; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, undef renamable $q2 ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, internal renamable $vpr, internal undef renamable $q2 ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, renamable $vpr, internal undef renamable $q2
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: } ; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 ; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2 renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q2, 1, renamable $vpr, undef renamable $q2 renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q2, 1, renamable $vpr, undef renamable $q2
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1 renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
$q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir

Show First 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
constants: [] constants: []
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $q3, $r0 liveins: $q0, $q1, $q2, $q3, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $q3, $r0 ; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q2, implicit $q3, implicit killed $q0 { ; CHECK: BUNDLE implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit $vpr, implicit killed $q2, implicit $q3, implicit killed $q0 {
; CHECK: MVE_VPST 1, implicit-def $vpr ; CHECK: MVE_VPST 1, implicit $vpr
; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, internal renamable $vpr, undef renamable $q2 ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, internal renamable $vpr, internal undef renamable $q2 ; CHECK: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, renamable $vpr, internal undef renamable $q2
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, internal renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, renamable $q3, 1, internal renamable $vpr, internal undef renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, renamable $q3, 1, renamable $vpr, internal undef renamable $q0
; CHECK: } ; CHECK: }
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q0, implicit killed $q3, implicit killed $q1 { ; CHECK: BUNDLE implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q0, implicit killed $q3, implicit killed $q1 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, internal killed renamable $vpr, killed renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
; CHECK: } ; CHECK: }
; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 ; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2 renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q2, 1, renamable $vpr, undef renamable $q2 renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q2, 1, renamable $vpr, undef renamable $q2
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, renamable $q3, 1, renamable $vpr, undef renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, renamable $q3, 1, renamable $vpr, undef renamable $q0
renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1 renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
$q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0 $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $r0 liveins: $q0, $q1, $q2, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $r0 ; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q1, implicit $q2, implicit killed $q3 { ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, internal renamable $vpr, undef renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: } ; CHECK: }
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 { ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: } ; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1 renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block6.mir

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $r0, $r1 liveins: $q0, $q1, $q2, $r0, $r1
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $r0, $r1 ; CHECK: liveins: $q0, $q1, $q2, $r0, $r1
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $q1, implicit $q2, implicit killed $q3 { ; CHECK: BUNDLE implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal killed renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, killed renamable $vpr, killed renamable $q3
; CHECK: } ; CHECK: }
; CHECK: $vpr = VMSR_P0 killed $r1, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r1, 14, $noreg
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q3, implicit killed $q2, implicit killed $q0 { ; CHECK: BUNDLE implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q3, implicit killed $q2, implicit killed $q0 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: } ; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, killed renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, killed renamable $vpr, killed renamable $q3
$vpr = VMSR_P0 killed $r1, 14, $noreg $vpr = VMSR_P0 killed $r1, 14, $noreg
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-block7.mir

Show First 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
constants: [] constants: []
body: | body: |
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: bb.0.entry: ; CHECK: bb.0.entry:
; CHECK: successors: %bb.1(0x80000000) ; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $q0, $q1, $q2, $r0 ; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q1, implicit $q2, implicit killed $q3 { ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, internal renamable $vpr, undef renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: } ; CHECK: }
; CHECK: bb.1.bb2: ; CHECK: bb.1.bb2:
; CHECK: liveins: $q0, $q1, $q2, $q3, $vpr ; CHECK: liveins: $q0, $q1, $q2, $q3, $vpr
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 { ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: } ; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $r0 liveins: $q0, $q1, $q2, $r0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
Show All 10 Lines

llvm/test/CodeGen/Thumb2/mve-vpt-block8.mir

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2, $r0 liveins: $q0, $q1, $q2, $r0
; CHECK-LABEL: name: test_vminnmq_m_f32_v2 ; CHECK-LABEL: name: test_vminnmq_m_f32_v2
; CHECK: liveins: $q0, $q1, $q2, $r0 ; CHECK: liveins: $q0, $q1, $q2, $r0
; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg ; CHECK: $vpr = VMSR_P0 killed $r0, 14, $noreg
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def $vpr, implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit killed $q1, implicit $q2, implicit killed $q3 { ; CHECK: BUNDLE implicit-def $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit $vpr, implicit killed $q1, implicit $q2, implicit killed $q3 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $q3, implicit undef $q1 { ; CHECK: BUNDLE implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit $vpr, implicit killed $q3, implicit undef $q1 {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, internal renamable $vpr, undef renamable $q1 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1
; CHECK: } ; CHECK: }
; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 ; CHECK: $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
; CHECK: BUNDLE implicit-def dead $vpr, implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 { ; CHECK: BUNDLE implicit-def dead $q3, implicit-def $d6, implicit-def $s12, implicit-def $s13, implicit-def $d7, implicit-def $s14, implicit-def $s15, implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $q1, implicit killed $q2, implicit killed $q3, implicit killed $q0 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, internal renamable $vpr, killed renamable $q3 ; CHECK: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, internal killed renamable $vpr, killed renamable $q0 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
; CHECK: } ; CHECK: }
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
$vpr = VMSR_P0 killed $r0, 14, $noreg $vpr = VMSR_P0 killed $r0, 14, $noreg
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1 renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, renamable $q3, 1, renamable $vpr, undef renamable $q1
$q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3 $q3 = MVE_VORR $q0, $q0, 0, $noreg, undef $q3
renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0 renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...

llvm/test/CodeGen/Thumb2/mve-vpt-nots.mir

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines bb.0.entry:
; CHECK-LABEL: name: vpnot ; CHECK-LABEL: name: vpnot
; CHECK: liveins: $q0, $q1, $q2 ; CHECK: liveins: $q0, $q1, $q2
; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 { ; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 {
; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr ; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
Show All 15 Linesbody: |
; CHECK: liveins: $q0, $q1, $q2 ; CHECK: liveins: $q0, $q1, $q2
; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 { ; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 {
; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr ; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: bb.1.bb2: ; CHECK: bb.1.bb2:
; CHECK: liveins: $q0, $q1, $q2, $vpr ; CHECK: liveins: $q0, $q1, $q2, $vpr
; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2 liveins: $q0, $q1, $q2
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
Show All 22 Lines bb.0.entry:
; CHECK-LABEL: name: vpnot_two ; CHECK-LABEL: name: vpnot_two
; CHECK: liveins: $q0, $q1, $q2 ; CHECK: liveins: $q0, $q1, $q2
; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 { ; CHECK: BUNDLE implicit-def $vpr, implicit $q0, implicit $zr, implicit $q1 {
; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr ; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
Show All 19 Lines bb.0.entry:
; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr ; CHECK: MVE_VPTv4s32r 8, renamable $q0, $zr, 11, implicit-def $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
Show All 15 Lines
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2 liveins: $q0, $q1, $q2
; CHECK-LABEL: name: vpnot_first ; CHECK-LABEL: name: vpnot_first
; CHECK: liveins: $q0, $q1, $q2 ; CHECK: liveins: $q0, $q1, $q2
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit $q1, implicit $zr, implicit killed $q2 { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit $q1, implicit $zr, implicit killed $q2 {
; CHECK: MVE_VPST 4, implicit-def $vpr ; CHECK: MVE_VPST 4, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
Show All 12 Lines
body: | body: |
bb.0.entry: bb.0.entry:
liveins: $q0, $q1, $q2 liveins: $q0, $q1, $q2
; CHECK-LABEL: name: vpnot_many ; CHECK-LABEL: name: vpnot_many
; CHECK: liveins: $q0, $q1, $q2 ; CHECK: liveins: $q0, $q1, $q2
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit $q1, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit $q1, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: BUNDLE implicit-def $vpr, implicit killed $q2, implicit $zr { ; CHECK: BUNDLE implicit-def $vpr, implicit killed $vpr, implicit killed $q2, implicit $zr {
; CHECK: MVE_VPST 8, implicit-def $vpr ; CHECK: MVE_VPST 8, implicit $vpr
; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, internal killed renamable $vpr ; CHECK: renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
; CHECK: } ; CHECK: }
; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg ; CHECK: renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr ; CHECK: renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
; CHECK: tBX_RET 14, $noreg, implicit $q0 ; CHECK: tBX_RET 14, $noreg, implicit $q0
renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg renamable $vpr = MVE_VCMPs32r renamable $q0, $zr, 11, 0, $noreg
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr renamable $vpr = MVE_VCMPs32r renamable $q1, $zr, 12, 1, killed renamable $vpr
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr renamable $vpr = MVE_VCMPi32r killed renamable $q2, $zr, 0, 1, killed renamable $vpr
renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg
renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr renamable $q0 = MVE_VPSEL killed renamable $q0, killed renamable $q1, 0, killed renamable $vpr
tBX_RET 14, $noreg, implicit $q0 tBX_RET 14, $noreg, implicit $q0
... ...