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Differential D68999

[ARM] Extra qdadd patterns
ClosedPublic

Authored by dmgreen on Oct 15 2019, 10:18 AM.

Details

Reviewers
samparker
SjoerdMeijer
efriedma
Commits
rG0765a4c28890: [ARM] Extra qdadd patterns
rL375414: [ARM] Extra qdadd patterns
Summary

This adds some new qdadd patterns to go along with the other recently added qadd's.

Diff Detail

Event Timeline

dmgreen created this revision.Oct 15 2019, 10:18 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 15 2019, 10:18 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald Transcript
dmgreen mentioned this in D68976: [ARM] Add qadd lowering from a sadd_sat.Oct 16 2019, 6:00 AM
samparker accepted this revision.Oct 16 2019, 6:10 AM

LGTM

This revision is now accepted and ready to land.Oct 16 2019, 6:10 AM
Closed by commit rG0765a4c28890: [ARM] Extra qdadd patterns (authored by dmgreen). · Explain WhyOct 21 2019, 7:06 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
4 lines
4 lines
test/
CodeGen/
ARM/
18 lines

Diff 225069

llvm/lib/Target/ARM/ARMInstrInfo.td

Show First 20 Lines • Show All 3,753 Lines • ▼ Show 20 Lineslet DecoderMethod = "DecodeQADDInstruction" in
def QADD : AAIRevOpr<0b00010000, 0b00000101, "qadd", def QADD : AAIRevOpr<0b00010000, 0b00000101, "qadd",
[(set GPRnopc:$Rd, (int_arm_qadd GPRnopc:$Rm, GPRnopc:$Rn))]>; [(set GPRnopc:$Rd, (int_arm_qadd GPRnopc:$Rm, GPRnopc:$Rn))]>;
} }
def : ARMV5TEPat<(saddsat GPR:$a, GPR:$b), def : ARMV5TEPat<(saddsat GPR:$a, GPR:$b),
(QADD GPR:$a, GPR:$b)>; (QADD GPR:$a, GPR:$b)>;
def : ARMV5TEPat<(ssubsat GPR:$a, GPR:$b), def : ARMV5TEPat<(ssubsat GPR:$a, GPR:$b),
(QSUB GPR:$a, GPR:$b)>; (QSUB GPR:$a, GPR:$b)>;
def : ARMV5TEPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
(QDADD rGPR:$Rm, rGPR:$Rn)>;
def : ARMV5TEPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(QDSUB rGPR:$Rm, rGPR:$Rn)>;
def : ARMV6Pat<(ARMqadd8b rGPR:$Rm, rGPR:$Rn), def : ARMV6Pat<(ARMqadd8b rGPR:$Rm, rGPR:$Rn),
(QADD8 rGPR:$Rm, rGPR:$Rn)>; (QADD8 rGPR:$Rm, rGPR:$Rn)>;
def : ARMV6Pat<(ARMqsub8b rGPR:$Rm, rGPR:$Rn), def : ARMV6Pat<(ARMqsub8b rGPR:$Rm, rGPR:$Rn),
(QSUB8 rGPR:$Rm, rGPR:$Rn)>; (QSUB8 rGPR:$Rm, rGPR:$Rn)>;
def : ARMV6Pat<(ARMqadd16b rGPR:$Rm, rGPR:$Rn), def : ARMV6Pat<(ARMqadd16b rGPR:$Rm, rGPR:$Rn),
(QADD16 rGPR:$Rm, rGPR:$Rn)>; (QADD16 rGPR:$Rm, rGPR:$Rn)>;
def : ARMV6Pat<(ARMqsub16b rGPR:$Rm, rGPR:$Rn), def : ARMV6Pat<(ARMqsub16b rGPR:$Rm, rGPR:$Rn),
(QSUB16 rGPR:$Rm, rGPR:$Rn)>; (QSUB16 rGPR:$Rm, rGPR:$Rn)>;
▲ Show 20 Lines • Show All 2,449 Lines • Show Last 20 Lines

llvm/lib/Target/ARM/ARMInstrThumb2.td

Show First 20 Lines • Show All 2,393 Lines • ▼ Show 20 Linesdef : Thumb2DSPPat<(int_arm_qadd(int_arm_qadd rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
(t2QDADD rGPR:$Rm, rGPR:$Rn)>; (t2QDADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)), def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)),
(t2QDSUB rGPR:$Rm, rGPR:$Rn)>; (t2QDSUB rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(saddsat rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(saddsat rGPR:$Rm, rGPR:$Rn),
(t2QADD rGPR:$Rm, rGPR:$Rn)>; (t2QADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ssubsat rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ssubsat rGPR:$Rm, rGPR:$Rn),
(t2QSUB rGPR:$Rm, rGPR:$Rn)>; (t2QSUB rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
(t2QDADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(t2QDSUB rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ARMqadd8b rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ARMqadd8b rGPR:$Rm, rGPR:$Rn),
(t2QADD8 rGPR:$Rm, rGPR:$Rn)>; (t2QADD8 rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ARMqsub8b rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ARMqsub8b rGPR:$Rm, rGPR:$Rn),
(t2QSUB8 rGPR:$Rm, rGPR:$Rn)>; (t2QSUB8 rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ARMqadd16b rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ARMqadd16b rGPR:$Rm, rGPR:$Rn),
(t2QADD16 rGPR:$Rm, rGPR:$Rn)>; (t2QADD16 rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ARMqsub16b rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ARMqsub16b rGPR:$Rm, rGPR:$Rn),
(t2QSUB16 rGPR:$Rm, rGPR:$Rn)>; (t2QSUB16 rGPR:$Rm, rGPR:$Rn)>;
▲ Show 20 Lines • Show All 2,902 Lines • Show Last 20 Lines

llvm/test/CodeGen/ARM/qdadd.ll

Show All 30 Lines
; CHECK-T2NODSP-NEXT: cmp r0, r3 ; CHECK-T2NODSP-NEXT: cmp r0, r3
; CHECK-T2NODSP-NEXT: it vc ; CHECK-T2NODSP-NEXT: it vc
; CHECK-T2NODSP-NEXT: movvc r2, r0 ; CHECK-T2NODSP-NEXT: movvc r2, r0
; CHECK-T2NODSP-NEXT: mov r0, r2 ; CHECK-T2NODSP-NEXT: mov r0, r2
; CHECK-T2NODSP-NEXT: pop {r7, pc} ; CHECK-T2NODSP-NEXT: pop {r7, pc}
; ;
; CHECK-T2DSP-LABEL: qdadd: ; CHECK-T2DSP-LABEL: qdadd:
; CHECK-T2DSP: @ %bb.0: ; CHECK-T2DSP: @ %bb.0:
; CHECK-T2DSP-NEXT: qadd r0, r0, r0 ; CHECK-T2DSP-NEXT: qdadd r0, r0, r1
; CHECK-T2DSP-NEXT: qadd r0, r0, r1
; CHECK-T2DSP-NEXT: bx lr ; CHECK-T2DSP-NEXT: bx lr
; ;
; CHECK-ARM-LABEL: qdadd: ; CHECK-ARM-LABEL: qdadd:
; CHECK-ARM: @ %bb.0: ; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: qadd r0, r0, r0 ; CHECK-ARM-NEXT: qdadd r0, r0, r1
; CHECK-ARM-NEXT: qadd r0, r0, r1
; CHECK-ARM-NEXT: bx lr ; CHECK-ARM-NEXT: bx lr
%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x) %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
%tmp = call i32 @llvm.sadd.sat.i32(i32 %z, i32 %y) %tmp = call i32 @llvm.sadd.sat.i32(i32 %z, i32 %y)
ret i32 %tmp ret i32 %tmp
} }
define i32 @qdadd_c(i32 %x, i32 %y) nounwind { define i32 @qdadd_c(i32 %x, i32 %y) nounwind {
; CHECK-T2NODSP-LABEL: qdadd_c: ; CHECK-T2NODSP-LABEL: qdadd_c:
Show All 22 Lines
; CHECK-T2NODSP-NEXT: cmp r0, r1 ; CHECK-T2NODSP-NEXT: cmp r0, r1
; CHECK-T2NODSP-NEXT: it vc ; CHECK-T2NODSP-NEXT: it vc
; CHECK-T2NODSP-NEXT: movvc r2, r0 ; CHECK-T2NODSP-NEXT: movvc r2, r0
; CHECK-T2NODSP-NEXT: mov r0, r2 ; CHECK-T2NODSP-NEXT: mov r0, r2
; CHECK-T2NODSP-NEXT: pop {r7, pc} ; CHECK-T2NODSP-NEXT: pop {r7, pc}
; ;
; CHECK-T2DSP-LABEL: qdadd_c: ; CHECK-T2DSP-LABEL: qdadd_c:
; CHECK-T2DSP: @ %bb.0: ; CHECK-T2DSP: @ %bb.0:
; CHECK-T2DSP-NEXT: qadd r0, r0, r0 ; CHECK-T2DSP-NEXT: qdadd r0, r0, r1
; CHECK-T2DSP-NEXT: qadd r0, r1, r0
; CHECK-T2DSP-NEXT: bx lr ; CHECK-T2DSP-NEXT: bx lr
; ;
; CHECK-ARM-LABEL: qdadd_c: ; CHECK-ARM-LABEL: qdadd_c:
; CHECK-ARM: @ %bb.0: ; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: qadd r0, r0, r0 ; CHECK-ARM-NEXT: qdadd r0, r0, r1
; CHECK-ARM-NEXT: qadd r0, r1, r0
; CHECK-ARM-NEXT: bx lr ; CHECK-ARM-NEXT: bx lr
%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x) %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
%tmp = call i32 @llvm.sadd.sat.i32(i32 %y, i32 %z) %tmp = call i32 @llvm.sadd.sat.i32(i32 %y, i32 %z)
ret i32 %tmp ret i32 %tmp
} }
define i32 @qdsub(i32 %x, i32 %y) nounwind { define i32 @qdsub(i32 %x, i32 %y) nounwind {
; CHECK-T2NODSP-LABEL: qdsub: ; CHECK-T2NODSP-LABEL: qdsub:
Show All 22 Lines
; CHECK-T2NODSP-NEXT: cmp r1, r3 ; CHECK-T2NODSP-NEXT: cmp r1, r3
; CHECK-T2NODSP-NEXT: it vc ; CHECK-T2NODSP-NEXT: it vc
; CHECK-T2NODSP-NEXT: movvc r2, r0 ; CHECK-T2NODSP-NEXT: movvc r2, r0
; CHECK-T2NODSP-NEXT: mov r0, r2 ; CHECK-T2NODSP-NEXT: mov r0, r2
; CHECK-T2NODSP-NEXT: pop {r7, pc} ; CHECK-T2NODSP-NEXT: pop {r7, pc}
; ;
; CHECK-T2DSP-LABEL: qdsub: ; CHECK-T2DSP-LABEL: qdsub:
; CHECK-T2DSP: @ %bb.0: ; CHECK-T2DSP: @ %bb.0:
; CHECK-T2DSP-NEXT: qadd r0, r0, r0 ; CHECK-T2DSP-NEXT: qdsub r0, r1, r0
; CHECK-T2DSP-NEXT: qsub r0, r1, r0
; CHECK-T2DSP-NEXT: bx lr ; CHECK-T2DSP-NEXT: bx lr
; ;
; CHECK-ARM-LABEL: qdsub: ; CHECK-ARM-LABEL: qdsub:
; CHECK-ARM: @ %bb.0: ; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: qadd r0, r0, r0 ; CHECK-ARM-NEXT: qdsub r0, r1, r0
; CHECK-ARM-NEXT: qsub r0, r1, r0
; CHECK-ARM-NEXT: bx lr ; CHECK-ARM-NEXT: bx lr
%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x) %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
%tmp = call i32 @llvm.ssub.sat.i32(i32 %y, i32 %z) %tmp = call i32 @llvm.ssub.sat.i32(i32 %y, i32 %z)
ret i32 %tmp ret i32 %tmp
} }
define i32 @qdsub_c(i32 %x, i32 %y) nounwind { define i32 @qdsub_c(i32 %x, i32 %y) nounwind {
; CHECK-T2NODSP-LABEL: qdsub_c: ; CHECK-T2NODSP-LABEL: qdsub_c:
▲ Show 20 Lines • Show All 46 Lines • Show Last 20 Lines