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aemerson aditya_nandakumar paquette
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It's produced by optimization combines in the DAG mostly, but AMDGPU does use this in a couple custom legalizations
If this is used only by one target (AMDGPU) (and does not require further legalizations), one alternative could be making this a target pseudo.
It's already a generic node for the DAG. ARM could use it, but doesn't. In practice it's a huge pain to make this target specific, since it shares most combines with FMA.
We also do have a problem now where we don't really have an equivalent of target specific nodes in GlobalISel. Intrinsics are close, but don't quite fill the purpose and would litter the IR intrinsic namespace
Makes sense.
We also do have a problem now where we don't really have an equivalent of target specific nodes in GlobalISel. Intrinsics are close, but don't quite fill the purpose and would litter the IR intrinsic namespace
The other alternative is to use Target Pseudo instructions with generic operands and it's selectable, but comes with it's drawbacks of not being able to further legalize.