[x86] Adding support for some missing intrinsics: _mm512_cvtsi512_si32

[yubing]

Summary

Adding support for some missing intrinsics:
_mm512_cvtsi512_si32

[RKSimon]

clang/lib/Headers/avx512fintrin.h

9662 ↗

(On Diff #217314)

Since we're adding this, we should set an example and include the doxygen comment as well (even though avx512 intrinsics aren't well documented). You should be able to copy the doxygen from _mm_cvtsi128_si32 in emmintrin.h with only trivial edits

clang/test/CodeGen/avx512f-builtins.c

10849 ↗

(On Diff #217314)

Put in alphabetical order? I make that just after test_mm_cvtsd_u32 ?

[yubing]

clang/lib/Headers/avx512fintrin.h

9662 ↗

(On Diff #217314)

Thanks for comments, I will fix them

clang/test/CodeGen/avx512f-builtins.c

10849 ↗

(On Diff #217314)

Do we really need to put them in alphabetical order?
It seems testcases in this file are out of order.

[craig.topper]

clang/lib/Headers/avx512fintrin.h

9669 ↗

(On Diff #217764)

__A

[craig.topper]

LGTM

cfe/trunk/lib/Headers/avx512fintrin.h

 
 static __inline__ float __DEFAULT_FN_ATTRS512
 _mm512_mask_reduce_min_ps(__mmask16 __M, __m512 __V) {
   __V = _mm512_mask_mov_ps(_mm512_set1_ps(__builtin_inff()), __M, __V);
   _mm512_mask_reduce_operator(min_ps);
 }
 #undef _mm512_mask_reduce_operator
 
+/// Moves the least significant 32 bits of a vector of [16 x i32] to a
+///    32-bit signed integer value.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
+///
+/// \param __A
+///    A vector of [16 x i32]. The least significant 32 bits are moved to the
+///    destination.
+/// \returns A 32-bit signed integer containing the moved value.
+static __inline__ int __DEFAULT_FN_ATTRS512
+_mm512_cvtsi512_si32(__m512i __A) {
+  __v16si __b = (__v16si)__A;
+  return __b[0];
+}
+
 #undef __DEFAULT_FN_ATTRS512
 #undef __DEFAULT_FN_ATTRS128
 #undef __DEFAULT_FN_ATTRS
 
 #endif /* __AVX512FINTRIN_H */

cfe/trunk/test/CodeGen/avx512f-builtins.c

 }
 
 unsigned test_mm_cvtsd_u32(__m128d __A) {
   // CHECK-LABEL: @test_mm_cvtsd_u32
   // CHECK: @llvm.x86.avx512.vcvtsd2usi32
   return _mm_cvtsd_u32(__A); 
 }
 
+int test_mm512_cvtsi512_si32(__m512i a) {
+  // CHECK-LABEL: test_mm512_cvtsi512_si32
+  // CHECK: %{{.*}} = extractelement <16 x i32> %{{.*}}, i32 0
+  return _mm512_cvtsi512_si32(a);
+}
+
 #ifdef __x86_64__
 unsigned long long test_mm_cvt_roundsd_u64(__m128d __A) {
   // CHECK-LABEL: @test_mm_cvt_roundsd_u64
   // CHECK: @llvm.x86.avx512.vcvtsd2usi64
   return _mm_cvt_roundsd_u64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
 }
 
 unsigned long long test_mm_cvtsd_u64(__m128d __A) {