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Differential D66385

AMDGPU/GlobalISel: Fix load/store of types in other address spaces
ClosedPublic

Authored by arsenm on Aug 17 2019, 5:51 PM.

Details

Reviewers
tstellar
nhaehnle
arsenm
Summary

There should probably be a size only matcher.

Diff Detail

Event Timeline

arsenm created this revision.Aug 17 2019, 5:51 PM
Herald added subscribers: Petar.Avramovic, t-tye, tpr and 6 others. · View Herald TranscriptAug 17 2019, 5:51 PM
arsenm updated this revision to Diff 215765.Aug 17 2019, 5:52 PM
arsenm updated this revision to Diff 215797.Aug 18 2019, 2:12 PM

Missed one

arsenm added a child revision: D66400: AMDGPU: Remove code address space predicates.Aug 18 2019, 2:26 PM
arsenm added a comment.Aug 27 2019, 12:05 PM

ping

arsenm updated this revision to Diff 218019.Aug 29 2019, 8:43 PM

Rebase and fix failure

arsenm accepted this revision.Sep 5 2019, 5:34 PM

r371155

This revision is now accepted and ready to land.Sep 5 2019, 5:34 PM
arsenm closed this revision.Sep 5 2019, 5:34 PM

Revision Contents

PathSize
lib/
Target/
AMDGPU/
9 lines
22 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
108 lines
36 lines
36 lines

Diff 218019

lib/Target/AMDGPU/BUFInstructions.td

Show First 20 Lines • Show All 1,528 Lines • ▼ Show 20 Lines
defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i32, zextloadi8_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i32, zextloadi8_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_SBYTE_OFFEN, BUFFER_LOAD_SBYTE_OFFSET, i16, sextloadi8_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_SBYTE_OFFEN, BUFFER_LOAD_SBYTE_OFFSET, i16, sextloadi8_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i16, extloadi8_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i16, extloadi8_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i16, zextloadi8_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_UBYTE_OFFEN, BUFFER_LOAD_UBYTE_OFFSET, i16, zextloadi8_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_SSHORT_OFFEN, BUFFER_LOAD_SSHORT_OFFSET, i32, sextloadi16_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_SSHORT_OFFEN, BUFFER_LOAD_SSHORT_OFFSET, i32, sextloadi16_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i32, extloadi16_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i32, extloadi16_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i32, zextloadi16_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i32, zextloadi16_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i16, load_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_USHORT_OFFEN, BUFFER_LOAD_USHORT_OFFSET, i16, load_private>;
foreach vt = [i32, f32, v2i16, v2f16, p2, p3, p5, p6] in {
defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORD_OFFEN, BUFFER_LOAD_DWORD_OFFSET, i32, load_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORD_OFFEN, BUFFER_LOAD_DWORD_OFFSET, i32, load_private>;
}
defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX2_OFFEN, BUFFER_LOAD_DWORDX2_OFFSET, v2i32, load_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX2_OFFEN, BUFFER_LOAD_DWORDX2_OFFSET, v2i32, load_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX3_OFFEN, BUFFER_LOAD_DWORDX3_OFFSET, v3i32, load_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX3_OFFEN, BUFFER_LOAD_DWORDX3_OFFSET, v3i32, load_private>;
defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX4_OFFEN, BUFFER_LOAD_DWORDX4_OFFSET, v4i32, load_private>; defm : MUBUFScratchLoadPat <BUFFER_LOAD_DWORDX4_OFFEN, BUFFER_LOAD_DWORDX4_OFFSET, v4i32, load_private>;
let OtherPredicates = [D16PreservesUnusedBits] in { let OtherPredicates = [D16PreservesUnusedBits] in {
defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_SHORT_D16_HI_OFFEN, BUFFER_LOAD_SHORT_D16_HI_OFFSET, v2i16, load_d16_hi_private>; defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_SHORT_D16_HI_OFFEN, BUFFER_LOAD_SHORT_D16_HI_OFFSET, v2i16, load_d16_hi_private>;
defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_UBYTE_D16_HI_OFFEN, BUFFER_LOAD_UBYTE_D16_HI_OFFSET, v2i16, az_extloadi8_d16_hi_private>; defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_UBYTE_D16_HI_OFFEN, BUFFER_LOAD_UBYTE_D16_HI_OFFSET, v2i16, az_extloadi8_d16_hi_private>;
defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_SBYTE_D16_HI_OFFEN, BUFFER_LOAD_SBYTE_D16_HI_OFFSET, v2i16, sextloadi8_d16_hi_private>; defm : MUBUFScratchLoadPat_D16<BUFFER_LOAD_SBYTE_D16_HI_OFFEN, BUFFER_LOAD_SBYTE_D16_HI_OFFSET, v2i16, sextloadi8_d16_hi_private>;
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines def : GCNPat <
(InstrOffset rc:$value, $srsrc, $soffset, $offset, 0, 0, 0, 0) (InstrOffset rc:$value, $srsrc, $soffset, $offset, 0, 0, 0, 0)
>; >;
} }
defm : MUBUFScratchStorePat <BUFFER_STORE_BYTE_OFFEN, BUFFER_STORE_BYTE_OFFSET, i32, truncstorei8_private>; defm : MUBUFScratchStorePat <BUFFER_STORE_BYTE_OFFEN, BUFFER_STORE_BYTE_OFFSET, i32, truncstorei8_private>;
defm : MUBUFScratchStorePat <BUFFER_STORE_SHORT_OFFEN, BUFFER_STORE_SHORT_OFFSET, i32, truncstorei16_private>; defm : MUBUFScratchStorePat <BUFFER_STORE_SHORT_OFFEN, BUFFER_STORE_SHORT_OFFSET, i32, truncstorei16_private>;
defm : MUBUFScratchStorePat <BUFFER_STORE_BYTE_OFFEN, BUFFER_STORE_BYTE_OFFSET, i16, truncstorei8_private>; defm : MUBUFScratchStorePat <BUFFER_STORE_BYTE_OFFEN, BUFFER_STORE_BYTE_OFFSET, i16, truncstorei8_private>;
defm : MUBUFScratchStorePat <BUFFER_STORE_SHORT_OFFEN, BUFFER_STORE_SHORT_OFFSET, i16, store_private>; defm : MUBUFScratchStorePat <BUFFER_STORE_SHORT_OFFEN, BUFFER_STORE_SHORT_OFFSET, i16, store_private>;
defm : MUBUFScratchStorePat <BUFFER_STORE_DWORD_OFFEN, BUFFER_STORE_DWORD_OFFSET, i32, store_private>;
foreach vt = [i32, f32, v2i16, v2f16, p2, p3, p5, p6] in {
defm : MUBUFScratchStorePat <BUFFER_STORE_DWORD_OFFEN, BUFFER_STORE_DWORD_OFFSET, vt, store_private>;
}
defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX2_OFFEN, BUFFER_STORE_DWORDX2_OFFSET, v2i32, store_private, VReg_64>; defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX2_OFFEN, BUFFER_STORE_DWORDX2_OFFSET, v2i32, store_private, VReg_64>;
defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX3_OFFEN, BUFFER_STORE_DWORDX3_OFFSET, v3i32, store_private, VReg_96>; defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX3_OFFEN, BUFFER_STORE_DWORDX3_OFFSET, v3i32, store_private, VReg_96>;
defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX4_OFFEN, BUFFER_STORE_DWORDX4_OFFSET, v4i32, store_private, VReg_128>; defm : MUBUFScratchStorePat <BUFFER_STORE_DWORDX4_OFFEN, BUFFER_STORE_DWORDX4_OFFSET, v4i32, store_private, VReg_128>;
let OtherPredicates = [D16PreservesUnusedBits] in { let OtherPredicates = [D16PreservesUnusedBits] in {
// Hiding the extract high pattern in the PatFrag seems to not // Hiding the extract high pattern in the PatFrag seems to not
// automatically increase the complexity. // automatically increase the complexity.
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lib/Target/AMDGPU/DSInstructions.td

Show First 20 Lines • Show All 633 Lines • ▼ Show 20 Lines
defm : DSReadPat_mc <DS_READ_U8, i32, "zextloadi8_local">; defm : DSReadPat_mc <DS_READ_U8, i32, "zextloadi8_local">;
defm : DSReadPat_mc <DS_READ_U8, i16, "extloadi8_local">; defm : DSReadPat_mc <DS_READ_U8, i16, "extloadi8_local">;
defm : DSReadPat_mc <DS_READ_U8, i16, "zextloadi8_local">; defm : DSReadPat_mc <DS_READ_U8, i16, "zextloadi8_local">;
defm : DSReadPat_mc <DS_READ_I16, i32, "sextloadi16_local">; defm : DSReadPat_mc <DS_READ_I16, i32, "sextloadi16_local">;
defm : DSReadPat_mc <DS_READ_I16, i32, "sextloadi16_local">; defm : DSReadPat_mc <DS_READ_I16, i32, "sextloadi16_local">;
defm : DSReadPat_mc <DS_READ_U16, i32, "extloadi16_local">; defm : DSReadPat_mc <DS_READ_U16, i32, "extloadi16_local">;
defm : DSReadPat_mc <DS_READ_U16, i32, "zextloadi16_local">; defm : DSReadPat_mc <DS_READ_U16, i32, "zextloadi16_local">;
defm : DSReadPat_mc <DS_READ_U16, i16, "load_local">; defm : DSReadPat_mc <DS_READ_U16, i16, "load_local">;
defm : DSReadPat_mc <DS_READ_B32, i32, "load_local">;
foreach vt = [i32, f32, v2i16, v2f16, p2, p3, p5, p6] in {
defm : DSReadPat_mc <DS_READ_B32, vt, "load_local">;
}
defm : DSReadPat_mc <DS_READ_B32, i32, "atomic_load_32_local">; defm : DSReadPat_mc <DS_READ_B32, i32, "atomic_load_32_local">;
defm : DSReadPat_mc <DS_READ_B64, i64, "atomic_load_64_local">; defm : DSReadPat_mc <DS_READ_B64, i64, "atomic_load_64_local">;
let AddedComplexity = 100 in { let AddedComplexity = 100 in {
defm : DSReadPat_mc <DS_READ_B64, v2i32, "load_align8_local">; foreach vt = VReg_64.RegTypes in {
defm : DSReadPat_mc <DS_READ_B64, vt, "load_align8_local">;
}
defm : DSReadPat_mc <DS_READ_B128, v4i32, "load_align16_local">; defm : DSReadPat_mc <DS_READ_B128, v4i32, "load_align16_local">;
} // End AddedComplexity = 100 } // End AddedComplexity = 100
let OtherPredicates = [D16PreservesUnusedBits] in { let OtherPredicates = [D16PreservesUnusedBits] in {
def : DSReadPat_D16<DS_READ_U16_D16_HI, load_d16_hi_local, v2i16>; def : DSReadPat_D16<DS_READ_U16_D16_HI, load_d16_hi_local, v2i16>;
def : DSReadPat_D16<DS_READ_U16_D16_HI, load_d16_hi_local, v2f16>; def : DSReadPat_D16<DS_READ_U16_D16_HI, load_d16_hi_local, v2f16>;
def : DSReadPat_D16<DS_READ_U8_D16_HI, az_extloadi8_d16_hi_local, v2i16>; def : DSReadPat_D16<DS_READ_U8_D16_HI, az_extloadi8_d16_hi_local, v2i16>;
Show All 40 Lines let OtherPredicates = [NotLDSRequiresM0Init] in {
def : DSAtomicWritePat<!cast<DS_Pseudo>(!cast<string>(inst)#"_gfx9"), vt, !cast<PatFrag>(frag)>; def : DSAtomicWritePat<!cast<DS_Pseudo>(!cast<string>(inst)#"_gfx9"), vt, !cast<PatFrag>(frag)>;
} }
} }
defm : DSWritePat_mc <DS_WRITE_B8, i32, "truncstorei8_local">; defm : DSWritePat_mc <DS_WRITE_B8, i32, "truncstorei8_local">;
defm : DSWritePat_mc <DS_WRITE_B16, i32, "truncstorei16_local">; defm : DSWritePat_mc <DS_WRITE_B16, i32, "truncstorei16_local">;
defm : DSWritePat_mc <DS_WRITE_B8, i16, "truncstorei8_local">; defm : DSWritePat_mc <DS_WRITE_B8, i16, "truncstorei8_local">;
defm : DSWritePat_mc <DS_WRITE_B16, i16, "store_local">; defm : DSWritePat_mc <DS_WRITE_B16, i16, "store_local">;
defm : DSWritePat_mc <DS_WRITE_B32, i32, "store_local">;
foreach vt = VGPR_32.RegTypes in {
defm : DSWritePat_mc <DS_WRITE_B32, vt, "store_local">;
}
defm : DSAtomicWritePat_mc <DS_WRITE_B32, i32, "atomic_store_local">; defm : DSAtomicWritePat_mc <DS_WRITE_B32, i32, "atomic_store_local">;
defm : DSAtomicWritePat_mc <DS_WRITE_B64, i64, "atomic_store_local">; defm : DSAtomicWritePat_mc <DS_WRITE_B64, i64, "atomic_store_local">;
let OtherPredicates = [D16PreservesUnusedBits] in { let OtherPredicates = [D16PreservesUnusedBits] in {
def : DSWritePat <DS_WRITE_B16_D16_HI, i32, store_local_hi16>; def : DSWritePat <DS_WRITE_B16_D16_HI, i32, store_local_hi16>;
def : DSWritePat <DS_WRITE_B8_D16_HI, i32, truncstorei8_local_hi16>; def : DSWritePat <DS_WRITE_B8_D16_HI, i32, truncstorei8_local_hi16>;
} }
Show All 20 Lines
let OtherPredicates = [NotLDSRequiresM0Init] in { let OtherPredicates = [NotLDSRequiresM0Init] in {
def : DS64Bit4ByteAlignedReadPat<DS_READ2_B32_gfx9, load_local>; def : DS64Bit4ByteAlignedReadPat<DS_READ2_B32_gfx9, load_local>;
def : DS64Bit4ByteAlignedWritePat<DS_WRITE2_B32_gfx9, store_local>; def : DS64Bit4ByteAlignedWritePat<DS_WRITE2_B32_gfx9, store_local>;
} }
let AddedComplexity = 100 in { let AddedComplexity = 100 in {
defm : DSWritePat_mc <DS_WRITE_B64, v2i32, "store_align8_local">; foreach vt = VReg_64.RegTypes in {
defm : DSWritePat_mc <DS_WRITE_B64, vt, "store_align8_local">;
}
defm : DSWritePat_mc <DS_WRITE_B128, v4i32, "store_align16_local">; defm : DSWritePat_mc <DS_WRITE_B128, v4i32, "store_align16_local">;
} // End AddedComplexity = 100 } // End AddedComplexity = 100
class DSAtomicRetPat<DS_Pseudo inst, ValueType vt, PatFrag frag, bit gds=0> : GCNPat < class DSAtomicRetPat<DS_Pseudo inst, ValueType vt, PatFrag frag, bit gds=0> : GCNPat <
(frag (DS1Addr1Offset i32:$ptr, i16:$offset), vt:$value), (frag (DS1Addr1Offset i32:$ptr, i16:$offset), vt:$value),
(inst $ptr, getVregSrcForVT<vt>.ret:$value, offset:$offset, (i1 gds)) (inst $ptr, getVregSrcForVT<vt>.ret:$value, offset:$offset, (i1 gds))
>; >;
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test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir

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tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_s64 ; GFX6-LABEL: name: load_local_s64
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX6: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX6: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; GFX6: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX7-LABEL: name: load_local_s64 ; GFX7-LABEL: name: load_local_s64
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX7: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; GFX7: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX9-LABEL: name: load_local_s64 ; GFX9-LABEL: name: load_local_s64
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX9: [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 8, addrspace 3)
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; GFX9: $vgpr0_vgpr1 = COPY [[DS_READ_B64_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(s64) = G_LOAD %0 :: (load 8, align 8, addrspace 3) %1:vgpr(s64) = G_LOAD %0 :: (load 8, align 8, addrspace 3)
$vgpr0_vgpr1 = COPY %1 $vgpr0_vgpr1 = COPY %1
... ...
--- ---
▲ Show 20 Lines • Show All 172 Lines • ▼ Show 20 Lines
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_p3_from_4 ; GFX6-LABEL: name: load_local_p3_from_4
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX6: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX6: $vgpr0 = COPY [[LOAD]](p3) ; GFX6: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX7-LABEL: name: load_local_p3_from_4 ; GFX7-LABEL: name: load_local_p3_from_4
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX7: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX7: $vgpr0 = COPY [[LOAD]](p3) ; GFX7: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX9-LABEL: name: load_local_p3_from_4 ; GFX9-LABEL: name: load_local_p3_from_4
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX9: [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 4, addrspace 3)
; GFX9: $vgpr0 = COPY [[LOAD]](p3) ; GFX9: $vgpr0 = COPY [[DS_READ_B32_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 3) %1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 3)
$vgpr0 = COPY %1 $vgpr0 = COPY %1
... ...
--- ---
name: load_local_p5_from_4 name: load_local_p5_from_4
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_p5_from_4 ; GFX6-LABEL: name: load_local_p5_from_4
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX6: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX6: $vgpr0 = COPY [[LOAD]](p3) ; GFX6: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX7-LABEL: name: load_local_p5_from_4 ; GFX7-LABEL: name: load_local_p5_from_4
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX7: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX7: $vgpr0 = COPY [[LOAD]](p3) ; GFX7: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX9-LABEL: name: load_local_p5_from_4 ; GFX9-LABEL: name: load_local_p5_from_4
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX9: [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 4, addrspace 3)
; GFX9: $vgpr0 = COPY [[LOAD]](p3) ; GFX9: $vgpr0 = COPY [[DS_READ_B32_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 3) %1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 3)
$vgpr0 = COPY %1 $vgpr0 = COPY %1
... ...
--- ---
name: load_local_p1_align8 name: load_local_p1_align8
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_p1_align8 ; GFX6-LABEL: name: load_local_p1_align8
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX6: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX6: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX6: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX7-LABEL: name: load_local_p1_align8 ; GFX7-LABEL: name: load_local_p1_align8
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX7: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX7: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX9-LABEL: name: load_local_p1_align8 ; GFX9-LABEL: name: load_local_p1_align8
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX9: [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 8, addrspace 3)
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX9: $vgpr0_vgpr1 = COPY [[DS_READ_B64_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 3) %1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 3)
$vgpr0_vgpr1 = COPY %1 $vgpr0_vgpr1 = COPY %1
... ...
--- ---
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tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_v2s16 ; GFX6-LABEL: name: load_local_v2s16
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX6: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX6: $vgpr0 = COPY [[LOAD]](<2 x s16>) ; GFX6: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX7-LABEL: name: load_local_v2s16 ; GFX7-LABEL: name: load_local_v2s16
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX7: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 4, addrspace 3)
; GFX7: $vgpr0 = COPY [[LOAD]](<2 x s16>) ; GFX7: $vgpr0 = COPY [[DS_READ_B32_]]
; GFX9-LABEL: name: load_local_v2s16 ; GFX9-LABEL: name: load_local_v2s16
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) ; GFX9: [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 4, addrspace 3)
; GFX9: $vgpr0 = COPY [[LOAD]](<2 x s16>) ; GFX9: $vgpr0 = COPY [[DS_READ_B32_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(<2 x s16>) = G_LOAD %0 :: (load 4, align 4, addrspace 3) %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load 4, align 4, addrspace 3)
$vgpr0 = COPY %1 $vgpr0 = COPY %1
... ...
--- ---
name: load_local_v4s16 name: load_local_v4s16
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; GFX6-LABEL: name: load_local_v4s16 ; GFX6-LABEL: name: load_local_v4s16
; GFX6: liveins: $vgpr0 ; GFX6: liveins: $vgpr0
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX6: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX6: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) ; GFX6: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX7-LABEL: name: load_local_v4s16 ; GFX7-LABEL: name: load_local_v4s16
; GFX7: liveins: $vgpr0 ; GFX7: liveins: $vgpr0
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX7: [[DS_READ_B64_:%[0-9]+]]:vreg_64 = DS_READ_B64 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load 8, addrspace 3)
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) ; GFX7: $vgpr0_vgpr1 = COPY [[DS_READ_B64_]]
; GFX9-LABEL: name: load_local_v4s16 ; GFX9-LABEL: name: load_local_v4s16
; GFX9: liveins: $vgpr0 ; GFX9: liveins: $vgpr0
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) ; GFX9: [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 [[COPY]], 0, 0, implicit $exec :: (load 8, addrspace 3)
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) ; GFX9: $vgpr0_vgpr1 = COPY [[DS_READ_B64_gfx9_]]
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(<4 x s16>) = G_LOAD %0 :: (load 8, align 8, addrspace 3) %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load 8, align 8, addrspace 3)
$vgpr0_vgpr1 = COPY %1 $vgpr0_vgpr1 = COPY %1
... ...
# --- # ---
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test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir

Show First 20 Lines • Show All 130 Lines • ▼ Show 20 LinesmachineFunctionInfo:
stackPtrOffsetReg: $sgpr32 stackPtrOffsetReg: $sgpr32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_v2s16 ; GFX6-LABEL: name: store_local_v2s16
; GFX6: liveins: $vgpr0, $vgpr1 ; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](<2 x s16>), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX6: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX7-LABEL: name: store_local_v2s16 ; GFX7-LABEL: name: store_local_v2s16
; GFX7: liveins: $vgpr0, $vgpr1 ; GFX7: liveins: $vgpr0, $vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](<2 x s16>), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX7: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX9-LABEL: name: store_local_v2s16 ; GFX9-LABEL: name: store_local_v2s16
; GFX9: liveins: $vgpr0, $vgpr1 ; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: G_STORE [[COPY]](<2 x s16>), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX9: DS_WRITE_B32_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 4, addrspace 3)
%0:vgpr(<2 x s16>) = COPY $vgpr0 %0:vgpr(<2 x s16>) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1 %1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 3) G_STORE %0, %1 :: (store 4, align 4, addrspace 3)
... ...
--- ---
name: store_local_p3 name: store_local_p3
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
machineFunctionInfo: machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4 scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32 stackPtrOffsetReg: $sgpr32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_p3 ; GFX6-LABEL: name: store_local_p3
; GFX6: liveins: $vgpr0, $vgpr1 ; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: $m0 = S_MOV_B32 -1 ; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](p3), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX6: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX7-LABEL: name: store_local_p3 ; GFX7-LABEL: name: store_local_p3
; GFX7: liveins: $vgpr0, $vgpr1 ; GFX7: liveins: $vgpr0, $vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: $m0 = S_MOV_B32 -1 ; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](p3), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX7: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX9-LABEL: name: store_local_p3 ; GFX9-LABEL: name: store_local_p3
; GFX9: liveins: $vgpr0, $vgpr1 ; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: G_STORE [[COPY]](p3), [[COPY1]](p3) :: (store 4, addrspace 3) ; GFX9: DS_WRITE_B32_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 4, addrspace 3)
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1 %1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 3) G_STORE %0, %1 :: (store 4, align 4, addrspace 3)
... ...
--- ---
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test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir

Show First 20 Lines • Show All 106 Lines • ▼ Show 20 LinesmachineFunctionInfo:
stackPtrOffsetReg: $sgpr32 stackPtrOffsetReg: $sgpr32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_private_v2s16 ; GFX6-LABEL: name: store_private_v2s16
; GFX6: liveins: $vgpr0, $vgpr1 ; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: G_STORE [[COPY]](<2 x s16>), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX6: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
; GFX9-LABEL: name: store_private_v2s16 ; GFX9-LABEL: name: store_private_v2s16
; GFX9: liveins: $vgpr0, $vgpr1 ; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: G_STORE [[COPY]](<2 x s16>), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX9: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
%0:vgpr(<2 x s16>) = COPY $vgpr0 %0:vgpr(<2 x s16>) = COPY $vgpr0
%1:vgpr(p5) = COPY $vgpr1 %1:vgpr(p5) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 5) G_STORE %0, %1 :: (store 4, align 4, addrspace 5)
... ...
--- ---
name: store_private_p3 name: store_private_p3
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
machineFunctionInfo: machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4 scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32 stackPtrOffsetReg: $sgpr32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_private_p3 ; GFX6-LABEL: name: store_private_p3
; GFX6: liveins: $vgpr0, $vgpr1 ; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: G_STORE [[COPY]](p3), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX6: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
; GFX9-LABEL: name: store_private_p3 ; GFX9-LABEL: name: store_private_p3
; GFX9: liveins: $vgpr0, $vgpr1 ; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: G_STORE [[COPY]](p3), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX9: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
%0:vgpr(p3) = COPY $vgpr0 %0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p5) = COPY $vgpr1 %1:vgpr(p5) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 5) G_STORE %0, %1 :: (store 4, align 4, addrspace 5)
... ...
--- ---
name: store_private_p5 name: store_private_p5
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
machineFunctionInfo: machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4 scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32 stackPtrOffsetReg: $sgpr32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_private_p5 ; GFX6-LABEL: name: store_private_p5
; GFX6: liveins: $vgpr0, $vgpr1 ; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr(p5) = COPY $vgpr0 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: G_STORE [[COPY]](p5), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX6: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
; GFX9-LABEL: name: store_private_p5 ; GFX9-LABEL: name: store_private_p5
; GFX9: liveins: $vgpr0, $vgpr1 ; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p5) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p5) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: G_STORE [[COPY]](p5), [[COPY1]](p5) :: (store 4, addrspace 5) ; GFX9: BUFFER_STORE_DWORD_OFFEN [[COPY]], [[COPY1]], $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 5)
%0:vgpr(p5) = COPY $vgpr0 %0:vgpr(p5) = COPY $vgpr0
%1:vgpr(p5) = COPY $vgpr1 %1:vgpr(p5) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 5) G_STORE %0, %1 :: (store 4, align 4, addrspace 5)
... ...
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