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[ARM][LowOverheadLoops] Add CPSR defs
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Authored by samparker on Jul 25 2019, 5:22 AM.

Details

Summary

Both WhileLoopStart and LoopDec may get turned into a sub and cmp pair, so add an implicit def to these pseudo instructions in that WLS and LE aren't generated. This has resulted in all the mir test changes.

Diff Detail

Repository
rL LLVM

Event Timeline

samparker created this revision.Jul 25 2019, 5:22 AM
SjoerdMeijer accepted this revision.Jul 25 2019, 5:58 AM

Looks like a sensible fix to me, just one question/nit inline.

lib/Target/ARM/ARMInstrThumb2.td
5226 ↗(On Diff #211722)

Instruction sizes: is that something we can, or actually want to test? I don't think I have seen tests for thhat, but was just wondering it because you're changing it here. If there's no precedent for it, perhaps just a comment that we assume that this expands to 2 instructions?

This revision is now accepted and ready to land.Jul 25 2019, 5:58 AM
samparker marked an inline comment as done.Jul 25 2019, 11:56 PM
samparker added inline comments.
lib/Target/ARM/ARMInstrThumb2.td
5226 ↗(On Diff #211722)

I'll add a comment!

This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptJul 26 2019, 1:17 AM

I made some changes before committing - after noticing I should have attached the def to LoopEnd and not LoopDec.