Page MenuHomePhabricator

[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
ClosedPublic

Authored by aemerson on Tue, Jul 23, 2:17 PM.

Details

Summary

We need to be able to load and store s128 for memcpy inlining, where we want to generate Q register mem ops. Making these legal also requires that we add some support in other instructions. Regbankselect should also know about these since they have no GPR register class that can hold them, so need special handling to live on the FPR bank.

Diff Detail

Repository
rL LLVM

Event Timeline

aemerson created this revision.Tue, Jul 23, 2:17 PM
aemerson marked an inline comment as done.Tue, Jul 23, 2:18 PM
aemerson added inline comments.
llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
4 ↗(On Diff #211354)

These tests are being removed because they don't do anything useful anymore after we may s128 loads legal.

This revision is now accepted and ready to land.Tue, Jul 23, 2:27 PM
This revision was automatically updated to reflect the committed changes.
phosek added a subscriber: phosek.Wed, Jul 24, 1:29 AM

We're seeing the following error in our build which appears to have been introduced by this change:

fatal error: error in backend: Attempting to emit INSvi64gpr instruction but the Feature_HasNEON predicate(s) are not met

I've filed a bug PR42734 which also contains the reproducer.

We're seeing the following error in our build which appears to have been introduced by this change:

fatal error: error in backend: Attempting to emit INSvi64gpr instruction but the Feature_HasNEON predicate(s) are not met

I've filed a bug PR42734 which also contains the reproducer.

We don't really support no-neon or no-fp targets in GISel at the moment. I've committed a workaround which will cause GISel to bail out of those target features are not present in r366957.