This is an archive of the discontinued LLVM Phabricator instance.

[InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563)
ClosedPublic

Authored by lebedev.ri on Jul 10 2019, 10:14 AM.

Details

Summary

If we have some pattern that leaves only some low bits set, and then performs
left-shift of those bits, if none of the bits that are left after the final
shift are modified by the mask, we can omit the mask.

There are many variants to this pattern:
b. (x & (~(-1 << maskNbits))) << shiftNbits
All these patterns can be simplified to just:
x << ShiftShAmt
iff:
b. (MaskShAmt+ShiftShAmt) u>= bitwidth(x)

alive proof:
b: https://rise4fun.com/Alive/y8M

For now let's start with patterns where both shift amounts are variable,
with trivial constant "offset" between them, since i believe this is
both simplest to handle and i think this is most common.
But again, there are likely other variants where we could use
ValueTracking/ConstantRange to handle more cases.

https://bugs.llvm.org/show_bug.cgi?id=42563

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Jul 10 2019, 10:14 AM

Fixup comment, NFC.

Really fix comments this time, NFC.

lebedev.ri edited the summary of this revision. (Show Details)

Rebased over re-combed tests, NFC.

This revision was not accepted when it landed; it landed in state Needs Review.Jul 19 2019, 1:28 AM
This revision was automatically updated to reflect the committed changes.