[InstCombine] Dropping redundant masking before left-shift [2/5] (PR42563)

[lebedev.ri]

Summary

If we have some pattern that leaves only some low bits set, and then performs
left-shift of those bits, if none of the bits that are left after the final
shift are modified by the mask, we can omit the mask.

There are many variants to this pattern:
c. (x & (-1 >> MaskShAmt)) << ShiftShAmt
All these patterns can be simplified to just:
x << ShiftShAmt
iff:
c. (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)

alive proofs:
c: https://rise4fun.com/Alive/RgJh

For now let's start with patterns where both shift amounts are variable,
with trivial constant "offset" between them, since i believe this is
both simplest to handle and i think this is most common.
But again, there are likely other variants where we could use
ValueTracking/ConstantRange to handle more cases.

https://bugs.llvm.org/show_bug.cgi?id=42563

[lebedev.ri]

Rebased over re-combed tests, NFC.

[lebedev.ri]

llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp

121 ↗

(On Diff #209049)

It may be possible to use SimplifyICmpInst() here,
we also could ask it about ShiftShAmt u>= MaskShAmt
May look into that after patchset.

[lebedev.ri]

Rebased, addressed review notes (from the first patch).

llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp

 
 // If we have some pattern that leaves only some low bits set, and then performs
 // left-shift of those bits, if none of the bits that are left after the final
 // shift are modified by the mask, we can omit the mask.
 //
 // There are many variants to this pattern:
 //   a)  (x & ((1 << MaskShAmt) - 1)) << ShiftShAmt
 //   b)  (x & (~(-1 << MaskShAmt))) << ShiftShAmt
+//   c)  (x & (-1 >> MaskShAmt)) << ShiftShAmt
 // All these patterns can be simplified to just:
 //   x << ShiftShAmt
 // iff:
 //   a,b) (MaskShAmt+ShiftShAmt) u>= bitwidth(x)
+//   c)   (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)
 static Instruction *
 dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
                                      const SimplifyQuery &SQ) {
   assert(OuterShift->getOpcode() == Instruction::BinaryOps::Shl &&
          "The input must be 'shl'!");
 
   Value *Masked = OuterShift->getOperand(0);
   Value *ShiftShAmt = OuterShift->getOperand(1);
 
   Value *MaskShAmt;
 
   // ((1 << MaskShAmt) - 1)
   auto MaskA = m_Add(m_Shl(m_One(), m_Value(MaskShAmt)), m_AllOnes());
   // (~(-1 << maskNbits))
   auto MaskB = m_Xor(m_Shl(m_AllOnes(), m_Value(MaskShAmt)), m_AllOnes());
+  // (-1 >> MaskShAmt)
+  auto MaskC = m_Shr(m_AllOnes(), m_Value(MaskShAmt));
 
   Value *X;
-  if (!match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X))))
-    return nullptr;
-
+  if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) {
     // Can we simplify (MaskShAmt+ShiftShAmt) ?
     Value *SumOfShAmts =
         SimplifyAddInst(MaskShAmt, ShiftShAmt, /*IsNSW=*/false, /*IsNUW=*/false,
                         SQ.getWithInstruction(OuterShift));
     if (!SumOfShAmts)
       return nullptr; // Did not simplify.
     // Is the total shift amount *not* smaller than the bit width?
     // FIXME: could also rely on ConstantRange.
     unsigned BitWidth = X->getType()->getScalarSizeInBits();
     if (!match(SumOfShAmts, m_SpecificInt_ICMP(ICmpInst::Predicate::ICMP_UGE,
                                                APInt(BitWidth, BitWidth))))
       return nullptr;
     // All good, we can do this fold.
+  } else if (match(Masked, m_c_And(MaskC, m_Value(X)))) {
+    // Can we simplify (ShiftShAmt-MaskShAmt) ?
+    Value *ShAmtsDiff =
+        SimplifySubInst(ShiftShAmt, MaskShAmt, /*IsNSW=*/false, /*IsNUW=*/false,
+                        SQ.getWithInstruction(OuterShift));
+    if (!ShAmtsDiff)
+      return nullptr; // Did not simplify.
+    // Is the difference non-negative? (is ShiftShAmt u>= MaskShAmt ?)
+    // FIXME: could also rely on ConstantRange.
+    if (!match(ShAmtsDiff, m_NonNegative()))
+      return nullptr;
+    // All good, we can do this fold.
+  } else
+    return nullptr; // Don't know anything about this pattern.
 
   // No 'NUW'/'NSW'!
   // We no longer know that we won't shift-out non-0 bits.
   return BinaryOperator::Create(OuterShift->getOpcode(), X, ShiftShAmt);
 }
 
 Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
   Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);

llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll

 declare void @use32(i32)
 
 define i32 @t0_basic(i32 %x, i32 %nbits) {
 ; CHECK-LABEL: @t0_basic(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[T1]], [[NBITS]]
+; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %t0, %x
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   %t2 = shl i32 %t1, %nbits
   ret i32 %t2
 }
 
 define i32 @t1_bigger_shift(i32 %x, i32 %nbits) {
 ; CHECK-LABEL: @t1_bigger_shift(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[NBITS]], 1
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
 ; CHECK-NEXT:    call void @use32(i32 [[T2]])
-; CHECK-NEXT:    [[T3:%.*]] = shl i32 [[T1]], [[T2]]
+; CHECK-NEXT:    [[T3:%.*]] = shl i32 [[X]], [[T2]]
 ; CHECK-NEXT:    ret i32 [[T3]]
 ;
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %t0, %x
   %t2 = add i32 %nbits, 1
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   call void @use32(i32 %t2)
   %t3 = shl i32 %t1, %t2
   ret i32 %t3
 }
 
 ; Vectors
 
 declare void @use3xi32(<3 x i32>)
 
 define <3 x i32> @t2_vec_splat(<3 x i32> %x, <3 x i32> %nbits) {
 ; CHECK-LABEL: @t2_vec_splat(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr <3 x i32> <i32 -1, i32 -1, i32 -1>, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and <3 x i32> [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    [[T2:%.*]] = add <3 x i32> [[NBITS]], <i32 1, i32 1, i32 1>
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T0]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T1]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T2]])
-; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
+; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
 ; CHECK-NEXT:    ret <3 x i32> [[T3]]
 ;
   %t0 = lshr <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
   %t1 = and <3 x i32> %t0, %x
   %t2 = add <3 x i32> %nbits, <i32 1, i32 1, i32 1>
   call void @use3xi32(<3 x i32> %t0)
   call void @use3xi32(<3 x i32> %t1)
   call void @use3xi32(<3 x i32> %t2)
   %t3 = shl <3 x i32> %t1, %t2
   ret <3 x i32> %t3
 }
 
 define <3 x i32> @t3_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) {
 ; CHECK-LABEL: @t3_vec_nonsplat(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr <3 x i32> <i32 -1, i32 -1, i32 -1>, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and <3 x i32> [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    [[T2:%.*]] = add <3 x i32> [[NBITS]], <i32 1, i32 0, i32 2>
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T0]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T1]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T2]])
-; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
+; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
 ; CHECK-NEXT:    ret <3 x i32> [[T3]]
 ;
   %t0 = lshr <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
   %t1 = and <3 x i32> %t0, %x
   %t2 = add <3 x i32> %nbits, <i32 1, i32 0, i32 2>
   call void @use3xi32(<3 x i32> %t0)
   call void @use3xi32(<3 x i32> %t1)
   call void @use3xi32(<3 x i32> %t2)
   %t3 = shl <3 x i32> %t1, %t2
   ret <3 x i32> %t3
 }
 
 define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) {
 ; CHECK-LABEL: @t4_vec_undef(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr <3 x i32> <i32 -1, i32 undef, i32 -1>, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and <3 x i32> [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    [[T2:%.*]] = add <3 x i32> [[NBITS]], <i32 1, i32 undef, i32 1>
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T0]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T1]])
 ; CHECK-NEXT:    call void @use3xi32(<3 x i32> [[T2]])
-; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
+; CHECK-NEXT:    [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
 ; CHECK-NEXT:    ret <3 x i32> [[T3]]
 ;
   %t0 = lshr <3 x i32> <i32 -1, i32 undef, i32 -1>, %nbits
   %t1 = and <3 x i32> %t0, %x
   %t2 = add <3 x i32> %nbits, <i32 1, i32 undef, i32 1>
   call void @use3xi32(<3 x i32> %t0)
   call void @use3xi32(<3 x i32> %t1)
   call void @use3xi32(<3 x i32> %t2)
   %t3 = shl <3 x i32> %t1, %t2
   ret <3 x i32> %t3
 }
 
 ; Commutativity
 
 declare i32 @gen32()
 
 define i32 @t5_commutativity0(i32 %nbits) {
 ; CHECK-LABEL: @t5_commutativity0(
 ; CHECK-NEXT:    [[X:%.*]] = call i32 @gen32()
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[X]], [[T0]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[T1]], [[NBITS]]
+; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %x = call i32 @gen32()
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %x, %t0 ; swapped
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   %t2 = shl i32 %t1, %nbits
   ret i32 %t2
 }
 
 define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) {
 ; CHECK-LABEL: @t6_commutativity1(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS0:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = lshr i32 -1, [[NBITS1:%.*]]
 ; CHECK-NEXT:    [[T2:%.*]] = and i32 [[T0]], [[T1]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
 ; CHECK-NEXT:    call void @use32(i32 [[T2]])
-; CHECK-NEXT:    [[T3:%.*]] = shl i32 [[T2]], [[NBITS0]]
+; CHECK-NEXT:    [[T3:%.*]] = shl i32 [[T1]], [[NBITS0]]
 ; CHECK-NEXT:    ret i32 [[T3]]
 ;
   %t0 = lshr i32 -1, %nbits0
   %t1 = lshr i32 -1, %nbits1
   %t2 = and i32 %t0, %t1 ; both hands of 'and' could be mask..
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   call void @use32(i32 %t2)

 ; Fast-math flags. We must not preserve them!
 
 define i32 @t8_nuw(i32 %x, i32 %nbits) {
 ; CHECK-LABEL: @t8_nuw(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = shl nuw i32 [[T1]], [[NBITS]]
+; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %t0, %x
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   %t2 = shl nuw i32 %t1, %nbits
   ret i32 %t2
 }
 
 define i32 @t9_nsw(i32 %x, i32 %nbits) {
 ; CHECK-LABEL: @t9_nsw(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = shl nsw i32 [[T1]], [[NBITS]]
+; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %t0, %x
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   %t2 = shl nsw i32 %t1, %nbits
   ret i32 %t2
 }
 
 define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) {
 ; CHECK-LABEL: @t10_nuw_nsw(
 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T0]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use32(i32 [[T0]])
 ; CHECK-NEXT:    call void @use32(i32 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = shl nuw nsw i32 [[T1]], [[NBITS]]
+; CHECK-NEXT:    [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %t0 = lshr i32 -1, %nbits
   %t1 = and i32 %t0, %x
   call void @use32(i32 %t0)
   call void @use32(i32 %t1)
   %t2 = shl nuw nsw i32 %t1, %nbits
   ret i32 %t2