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Differential D64514

[InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563)
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Authored by lebedev.ri on Jul 10 2019, 10:14 AM.

Details

Reviewers
spatel
nikic
huihuiz
xbolva00
Commits
rG4422a1657c66: [InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563)
rL366536: [InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563)
Summary

If we have some pattern that leaves only some low bits set, and then performs
left-shift of those bits, if none of the bits that are left after the final
shift are modified by the mask, we can omit the mask.

There are many variants to this pattern:
b. (x & (~(-1 << maskNbits))) << shiftNbits
All these patterns can be simplified to just:
x << ShiftShAmt
iff:
b. (MaskShAmt+ShiftShAmt) u>= bitwidth(x)

alive proof:
b: https://rise4fun.com/Alive/y8M

For now let's start with patterns where both shift amounts are variable,
with trivial constant "offset" between them, since i believe this is
both simplest to handle and i think this is most common.
But again, there are likely other variants where we could use
ValueTracking/ConstantRange to handle more cases.

https://bugs.llvm.org/show_bug.cgi?id=42563

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Jul 10 2019, 10:14 AM
Herald added a subscriber: hiraditya. · View Herald TranscriptJul 10 2019, 10:14 AM
lebedev.ri added a parent revision: D64512: [InstCombine] Dropping redundant masking before left-shift [0/5] (PR42563).Jul 10 2019, 10:14 AM
lebedev.ri updated this revision to Diff 209009.Jul 10 2019, 10:19 AM

Fixup comment, NFC.

lebedev.ri updated this revision to Diff 209011.Jul 10 2019, 10:20 AM

Really fix comments this time, NFC.

lebedev.ri added a child revision: D64517: [InstCombine] Dropping redundant masking before left-shift [2/5] (PR42563).Jul 10 2019, 10:47 AM
lebedev.ri updated this revision to Diff 209048.Jul 10 2019, 1:09 PM
lebedev.ri edited the summary of this revision. (Show Details)

Rebased over re-combed tests, NFC.

lebedev.ri updated this revision to Diff 210746.Jul 18 2019, 11:55 PM

Rebased

This revision was not accepted when it landed; it landed in state Needs Review.Jul 19 2019, 1:28 AM
Closed by commit rL366536: [InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563) (authored by lebedevri). · Explain Why
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Transforms/
InstCombine/
7 lines
test/
Transforms/
InstCombine/
22 lines

Diff 210763

llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp

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} }
// If we have some pattern that leaves only some low bits set, and then performs // If we have some pattern that leaves only some low bits set, and then performs
// left-shift of those bits, if none of the bits that are left after the final // left-shift of those bits, if none of the bits that are left after the final
// shift are modified by the mask, we can omit the mask. // shift are modified by the mask, we can omit the mask.
// //
// There are many variants to this pattern: // There are many variants to this pattern:
// a) (x & ((1 << MaskShAmt) - 1)) << ShiftShAmt // a) (x & ((1 << MaskShAmt) - 1)) << ShiftShAmt
// b) (x & (~(-1 << MaskShAmt))) << ShiftShAmt
// All these patterns can be simplified to just: // All these patterns can be simplified to just:
// x << ShiftShAmt // x << ShiftShAmt
// iff: // iff:
// a) (MaskShAmt+ShiftShAmt) u>= bitwidth(x) // a,b) (MaskShAmt+ShiftShAmt) u>= bitwidth(x)
static Instruction * static Instruction *
dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift, dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
const SimplifyQuery &SQ) { const SimplifyQuery &SQ) {
assert(OuterShift->getOpcode() == Instruction::BinaryOps::Shl && assert(OuterShift->getOpcode() == Instruction::BinaryOps::Shl &&
"The input must be 'shl'!"); "The input must be 'shl'!");
Value *Masked = OuterShift->getOperand(0); Value *Masked = OuterShift->getOperand(0);
Value *ShiftShAmt = OuterShift->getOperand(1); Value *ShiftShAmt = OuterShift->getOperand(1);
Value *MaskShAmt; Value *MaskShAmt;
// ((1 << MaskShAmt) - 1) // ((1 << MaskShAmt) - 1)
auto MaskA = m_Add(m_Shl(m_One(), m_Value(MaskShAmt)), m_AllOnes()); auto MaskA = m_Add(m_Shl(m_One(), m_Value(MaskShAmt)), m_AllOnes());
// (~(-1 << maskNbits))
auto MaskB = m_Xor(m_Shl(m_AllOnes(), m_Value(MaskShAmt)), m_AllOnes());
Value *X; Value *X;
if (!match(Masked, m_c_And(MaskA, m_Value(X)))) if (!match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X))))
return nullptr; return nullptr;
// Can we simplify (MaskShAmt+ShiftShAmt) ? // Can we simplify (MaskShAmt+ShiftShAmt) ?
Value *SumOfShAmts = Value *SumOfShAmts =
SimplifyAddInst(MaskShAmt, ShiftShAmt, /*IsNSW=*/false, /*IsNUW=*/false, SimplifyAddInst(MaskShAmt, ShiftShAmt, /*IsNSW=*/false, /*IsNUW=*/false,
SQ.getWithInstruction(OuterShift)); SQ.getWithInstruction(OuterShift));
if (!SumOfShAmts) if (!SumOfShAmts)
return nullptr; // Did not simplify. return nullptr; // Did not simplify.
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llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll

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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %t1, %x %t2 = and i32 %t1, %x
%t3 = sub i32 32, %nbits %t3 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
call void @use32(i32 %t1) call void @use32(i32 %t1)
call void @use32(i32 %t2) call void @use32(i32 %t2)
call void @use32(i32 %t3) call void @use32(i32 %t3)
%t4 = shl i32 %t2, %t3 %t4 = shl i32 %t2, %t3
ret i32 %t4 ret i32 %t4
} }
define i32 @t1_bigger_shift(i32 %x, i32 %nbits) { define i32 @t1_bigger_shift(i32 %x, i32 %nbits) {
; CHECK-LABEL: @t1_bigger_shift( ; CHECK-LABEL: @t1_bigger_shift(
; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 33, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 33, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %t1, %x %t2 = and i32 %t1, %x
%t3 = sub i32 33, %nbits ; subtracting from bitwidth+1 %t3 = sub i32 33, %nbits ; subtracting from bitwidth+1
call void @use32(i32 %t0) call void @use32(i32 %t0)
call void @use32(i32 %t1) call void @use32(i32 %t1)
Show All 10 Lines
; CHECK-NEXT: [[T2:%.*]] = xor i32 [[T1]], -1 ; CHECK-NEXT: [[T2:%.*]] = xor i32 [[T1]], -1
; CHECK-NEXT: [[T3:%.*]] = and i32 [[T2]], [[X:%.*]] ; CHECK-NEXT: [[T3:%.*]] = and i32 [[T2]], [[X:%.*]]
; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: call void @use32(i32 [[T4]]) ; CHECK-NEXT: call void @use32(i32 [[T4]])
; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T3]], [[T4]] ; CHECK-NEXT: [[T5:%.*]] = shl i32 [[X]], [[T4]]
; CHECK-NEXT: ret i32 [[T5]] ; CHECK-NEXT: ret i32 [[T5]]
; ;
%t0 = add i32 %nbits, 1 %t0 = add i32 %nbits, 1
%t1 = shl i32 -1, %t0 ; shifting by nbits+1 %t1 = shl i32 -1, %t0 ; shifting by nbits+1
%t2 = xor i32 %t1, -1 %t2 = xor i32 %t1, -1
%t3 = and i32 %t2, %x %t3 = and i32 %t2, %x
%t4 = sub i32 32, %nbits %t4 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
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; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 -1, i32 -1> ; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 -1, i32 -1>
; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]] ; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]]
; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 32, i32 32, i32 32>, [[NBITS]] ; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 32, i32 32, i32 32>, [[NBITS]]
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]])
; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[T3]], [[T4]] ; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[X]], [[T4]]
; CHECK-NEXT: ret <3 x i32> [[T5]] ; CHECK-NEXT: ret <3 x i32> [[T5]]
; ;
%t0 = add <3 x i32> %nbits, <i32 0, i32 0, i32 0> %t0 = add <3 x i32> %nbits, <i32 0, i32 0, i32 0>
%t1 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %t0 %t1 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %t0
%t2 = xor <3 x i32> %t1, <i32 -1, i32 -1, i32 -1> %t2 = xor <3 x i32> %t1, <i32 -1, i32 -1, i32 -1>
%t3 = and <3 x i32> %t2, %x %t3 = and <3 x i32> %t2, %x
%t4 = sub <3 x i32> <i32 32, i32 32, i32 32>, %nbits %t4 = sub <3 x i32> <i32 32, i32 32, i32 32>, %nbits
call void @use3xi32(<3 x i32> %t0) call void @use3xi32(<3 x i32> %t0)
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; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 -1, i32 -1> ; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 -1, i32 -1>
; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]] ; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]]
; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 33, i32 32, i32 32>, [[NBITS]] ; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 33, i32 32, i32 32>, [[NBITS]]
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]])
; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[T3]], [[T4]] ; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[X]], [[T4]]
; CHECK-NEXT: ret <3 x i32> [[T5]] ; CHECK-NEXT: ret <3 x i32> [[T5]]
; ;
%t0 = add <3 x i32> %nbits, <i32 -1, i32 0, i32 1> %t0 = add <3 x i32> %nbits, <i32 -1, i32 0, i32 1>
%t1 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %t0 %t1 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %t0
%t2 = xor <3 x i32> %t1, <i32 -1, i32 -1, i32 -1> %t2 = xor <3 x i32> %t1, <i32 -1, i32 -1, i32 -1>
%t3 = and <3 x i32> %t2, %x %t3 = and <3 x i32> %t2, %x
%t4 = sub <3 x i32> <i32 33, i32 32, i32 32>, %nbits %t4 = sub <3 x i32> <i32 33, i32 32, i32 32>, %nbits
call void @use3xi32(<3 x i32> %t0) call void @use3xi32(<3 x i32> %t0)
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; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 undef, i32 -1> ; CHECK-NEXT: [[T2:%.*]] = xor <3 x i32> [[T1]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]] ; CHECK-NEXT: [[T3:%.*]] = and <3 x i32> [[T2]], [[X:%.*]]
; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 32, i32 undef, i32 32>, [[NBITS]] ; CHECK-NEXT: [[T4:%.*]] = sub <3 x i32> <i32 32, i32 undef, i32 32>, [[NBITS]]
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]]) ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T4]])
; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[T3]], [[T4]] ; CHECK-NEXT: [[T5:%.*]] = shl <3 x i32> [[X]], [[T4]]
; CHECK-NEXT: ret <3 x i32> [[T5]] ; CHECK-NEXT: ret <3 x i32> [[T5]]
; ;
%t0 = add <3 x i32> %nbits, <i32 0, i32 undef, i32 0> %t0 = add <3 x i32> %nbits, <i32 0, i32 undef, i32 0>
%t1 = shl <3 x i32> <i32 -1, i32 undef, i32 -1>, %t0 %t1 = shl <3 x i32> <i32 -1, i32 undef, i32 -1>, %t0
%t2 = xor <3 x i32> %t1, <i32 -1, i32 undef, i32 -1> %t2 = xor <3 x i32> %t1, <i32 -1, i32 undef, i32 -1>
%t3 = and <3 x i32> %t2, %x %t3 = and <3 x i32> %t2, %x
%t4 = sub <3 x i32> <i32 32, i32 undef, i32 32>, %nbits %t4 = sub <3 x i32> <i32 32, i32 undef, i32 32>, %nbits
call void @use3xi32(<3 x i32> %t0) call void @use3xi32(<3 x i32> %t0)
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[X]], [[T1]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[X]], [[T1]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%x = call i32 @gen32() %x = call i32 @gen32()
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %x, %t1 ; swapped %t2 = and i32 %x, %t1 ; swapped
%t3 = sub i32 32, %nbits %t3 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
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; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]] ; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]]
; CHECK-NEXT: [[T5:%.*]] = sub i32 32, [[NBITS1]] ; CHECK-NEXT: [[T5:%.*]] = sub i32 32, [[NBITS1]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: call void @use32(i32 [[T4]]) ; CHECK-NEXT: call void @use32(i32 [[T4]])
; CHECK-NEXT: call void @use32(i32 [[T5]]) ; CHECK-NEXT: call void @use32(i32 [[T5]])
; CHECK-NEXT: [[T6:%.*]] = shl i32 [[T4]], [[T5]] ; CHECK-NEXT: [[T6:%.*]] = shl i32 [[T1]], [[T5]]
; CHECK-NEXT: ret i32 [[T6]] ; CHECK-NEXT: ret i32 [[T6]]
; ;
%t0 = shl i32 -1, %nbits0 %t0 = shl i32 -1, %nbits0
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = shl i32 -1, %nbits1 %t2 = shl i32 -1, %nbits1
%t3 = xor i32 %t2, -1 %t3 = xor i32 %t2, -1
%t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask.. %t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask..
%t5 = sub i32 32, %nbits1 %t5 = sub i32 32, %nbits1
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl nuw i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %t1, %x %t2 = and i32 %t1, %x
%t3 = sub i32 32, %nbits %t3 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
call void @use32(i32 %t1) call void @use32(i32 %t1)
call void @use32(i32 %t2) call void @use32(i32 %t2)
call void @use32(i32 %t3) call void @use32(i32 %t3)
%t4 = shl nuw i32 %t2, %t3 %t4 = shl nuw i32 %t2, %t3
ret i32 %t4 ret i32 %t4
} }
define i32 @t10_nsw(i32 %x, i32 %nbits) { define i32 @t10_nsw(i32 %x, i32 %nbits) {
; CHECK-LABEL: @t10_nsw( ; CHECK-LABEL: @t10_nsw(
; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl nsw i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %t1, %x %t2 = and i32 %t1, %x
%t3 = sub i32 32, %nbits %t3 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
call void @use32(i32 %t1) call void @use32(i32 %t1)
call void @use32(i32 %t2) call void @use32(i32 %t2)
call void @use32(i32 %t3) call void @use32(i32 %t3)
%t4 = shl nsw i32 %t2, %t3 %t4 = shl nsw i32 %t2, %t3
ret i32 %t4 ret i32 %t4
} }
define i32 @t11_nuw_nsw(i32 %x, i32 %nbits) { define i32 @t11_nuw_nsw(i32 %x, i32 %nbits) {
; CHECK-LABEL: @t11_nuw_nsw( ; CHECK-LABEL: @t11_nuw_nsw(
; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]]
; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T1]])
; CHECK-NEXT: call void @use32(i32 [[T2]]) ; CHECK-NEXT: call void @use32(i32 [[T2]])
; CHECK-NEXT: call void @use32(i32 [[T3]]) ; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = shl nuw nsw i32 [[T2]], [[T3]] ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
; CHECK-NEXT: ret i32 [[T4]] ; CHECK-NEXT: ret i32 [[T4]]
; ;
%t0 = shl i32 -1, %nbits %t0 = shl i32 -1, %nbits
%t1 = xor i32 %t0, -1 %t1 = xor i32 %t0, -1
%t2 = and i32 %t1, %x %t2 = and i32 %t1, %x
%t3 = sub i32 32, %nbits %t3 = sub i32 32, %nbits
call void @use32(i32 %t0) call void @use32(i32 %t0)
call void @use32(i32 %t1) call void @use32(i32 %t1)
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