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[MIPS GlobalISel] RegBankSelect for chains of ambiguous instructions
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Authored by Petar.Avramovic on Jul 10 2019, 6:46 AM.

Details

Summary

When one of the uses/defs of ambiguous instruction is also ambiguous
visit it recursively and search its uses/defs for instruction with
only one mapping available.
When all instruction in a chain are ambiguous arbitrary mapping can
be selected. For s64 operands in ambiguous chain fprb is selected since
it results in less instructions then having to narrow scalar s64 to s32.
For s32 both gprb and fprb result in same number of instructions and
gprb is selected like a general purpose option.

At the moment we always avoid cross register bank copies.
TODO: Implement a model for costs calculations of different mappings
on same instruction and cross bank copies. Allow cross bank copies
when appropriate according to cost model.

Diff Detail

Repository
rL LLVM

Event Timeline

atanasyan accepted this revision.Jul 10 2019, 11:09 PM

LGTM with a nit

lib/Target/Mips/MipsRegisterBankInfo.cpp
235 ↗(On Diff #208944)

Please remove "else-after-return".

268 ↗(On Diff #208944)

The same code with less continue statements.

// Defaults to integer instruction. Includes G_MERGE_VALUES and
// G_UNMERGE_VALUES.
if (!isAmbiguous(AdjMI->getOpcode())) {
  setTypes(MI, InstType::Integer);
  return true;
}

// When AdjMI was visited first, MI has to continue to explore remaining
// adjacent instructions and determine InstType without visiting AdjMI.
if (!wasVisited(AdjMI) ||
    getRecordedTypeForInstr(AdjMI) != InstType::NotDetermined) {
  if (visit(AdjMI, MI)) {
    // InstType is successfully determined and is same as for AdjMI.
    setTypes(MI, getRecordedTypeForInstr(AdjMI));
    return true;
  }
}
This revision is now accepted and ready to land.Jul 10 2019, 11:09 PM

Addressed review comments.

Petar.Avramovic marked 2 inline comments as done.Jul 11 2019, 1:37 AM
This revision was automatically updated to reflect the committed changes.