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Differential D64249

GlobalISel: Implement lower for G_FCOPYSIGN
ClosedPublic

Authored by arsenm on Jul 5 2019, 7:25 AM.

Details

Reviewers
aemerson
aditya_nandakumar
paquette
dsanders
Summary

In SelectionDAG AMDGPU treated these as legal, but this was mostly
because the bitcasts required for FP types were painful. Theoretically
the bitpattern should eventually match to bfi, so don't bother trying
to get the patterns to import.

Diff Detail

Event Timeline

arsenm created this revision.Jul 5 2019, 7:25 AM
Herald added subscribers: Petar.Avramovic, volkan, tpr and 4 others. · View Herald TranscriptJul 5 2019, 7:25 AM
paquette accepted this revision.Jul 9 2019, 1:08 PM

LGTM

This revision is now accepted and ready to land.Jul 9 2019, 1:08 PM
arsenm closed this revision.Jul 9 2019, 4:34 PM

r365583

Revision Contents

PathSize
include/
llvm/
CodeGen/
GlobalISel/
1 line
lib/
CodeGen/
GlobalISel/
50 lines
Target/
AMDGPU/
5 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
805 lines
36 lines

Diff 208178

include/llvm/CodeGen/GlobalISel/LegalizerHelper.h

Show First 20 Lines • Show All 213 Lines • ▼ Show 20 Linesprivate:
LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty); LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty); LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI); LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI);
LegalizeResult lowerUITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty); LegalizeResult lowerUITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerSITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty); LegalizeResult lowerSITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerMinMax(MachineInstr &MI, unsigned TypeIdx, LLT Ty); LegalizeResult lowerMinMax(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerFCopySign(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
MachineRegisterInfo &MRI; MachineRegisterInfo &MRI;
const LegalizerInfo &LI; const LegalizerInfo &LI;
/// To keep track of changes made by the LegalizerHelper. /// To keep track of changes made by the LegalizerHelper.
GISelChangeObserver &Observer; GISelChangeObserver &Observer;
}; };
/// Helper function that creates the given libcall. /// Helper function that creates the given libcall.
LegalizerHelper::LegalizeResult LegalizerHelper::LegalizeResult
createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall, createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
const CallLowering::ArgInfo &Result, const CallLowering::ArgInfo &Result,
ArrayRef<CallLowering::ArgInfo> Args); ArrayRef<CallLowering::ArgInfo> Args);
} // End namespace llvm. } // End namespace llvm.
#endif #endif

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Show First 20 Lines • Show All 1,660 Lines • ▼ Show 20 Lines case G_UITOFP:
return lowerUITOFP(MI, TypeIdx, Ty); return lowerUITOFP(MI, TypeIdx, Ty);
case G_SITOFP: case G_SITOFP:
return lowerSITOFP(MI, TypeIdx, Ty); return lowerSITOFP(MI, TypeIdx, Ty);
case G_SMIN: case G_SMIN:
case G_SMAX: case G_SMAX:
case G_UMIN: case G_UMIN:
case G_UMAX: case G_UMAX:
return lowerMinMax(MI, TypeIdx, Ty); return lowerMinMax(MI, TypeIdx, Ty);
case G_FCOPYSIGN:
return lowerFCopySign(MI, TypeIdx, Ty);
} }
} }
LegalizerHelper::LegalizeResult LegalizerHelper::fewerElementsVectorImplicitDef( LegalizerHelper::LegalizeResult LegalizerHelper::fewerElementsVectorImplicitDef(
MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy) { MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy) {
SmallVector<Register, 2> DstRegs; SmallVector<Register, 2> DstRegs;
unsigned NarrowSize = NarrowTy.getSizeInBits(); unsigned NarrowSize = NarrowTy.getSizeInBits();
▲ Show 20 Lines • Show All 1,522 Lines • ▼ Show 20 LinesLegalizerHelper::lowerMinMax(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
LLT CmpType = MRI.getType(Dst).changeElementSize(1); LLT CmpType = MRI.getType(Dst).changeElementSize(1);
auto Cmp = MIRBuilder.buildICmp(Pred, CmpType, Src0, Src1); auto Cmp = MIRBuilder.buildICmp(Pred, CmpType, Src0, Src1);
MIRBuilder.buildSelect(Dst, Cmp, Src0, Src1); MIRBuilder.buildSelect(Dst, Cmp, Src0, Src1);
MI.eraseFromParent(); MI.eraseFromParent();
return Legalized; return Legalized;
} }
LegalizerHelper::LegalizeResult
LegalizerHelper::lowerFCopySign(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
Register Dst = MI.getOperand(0).getReg();
Register Src0 = MI.getOperand(1).getReg();
Register Src1 = MI.getOperand(2).getReg();
const LLT Src0Ty = MRI.getType(Src0);
const LLT Src1Ty = MRI.getType(Src1);
const int Src0Size = Src0Ty.getScalarSizeInBits();
const int Src1Size = Src1Ty.getScalarSizeInBits();
auto SignBitMask = MIRBuilder.buildConstant(
Src0Ty, APInt::getSignMask(Src0Size));
auto NotSignBitMask = MIRBuilder.buildConstant(
Src0Ty, APInt::getLowBitsSet(Src0Size, Src0Size - 1));
auto And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask);
MachineInstr *Or;
if (Src0Ty == Src1Ty) {
auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask);
Or = MIRBuilder.buildOr(Dst, And0, And1);
} else if (Src0Size > Src1Size) {
auto ShiftAmt = MIRBuilder.buildConstant(Src0Ty, Src0Size - Src1Size);
auto Zext = MIRBuilder.buildZExt(Src0Ty, Src1);
auto Shift = MIRBuilder.buildShl(Src0Ty, Zext, ShiftAmt);
auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask);
Or = MIRBuilder.buildOr(Dst, And0, And1);
} else {
auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size);
auto Shift = MIRBuilder.buildLShr(Src1Ty, Src1, ShiftAmt);
auto Trunc = MIRBuilder.buildTrunc(Src0Ty, Shift);
auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask);
Or = MIRBuilder.buildOr(Dst, And0, And1);
}
// Be careful about setting nsz/nnan/ninf on every instruction, since the
// constants are a nan and -0.0, but the final result should preserve
// everything.
if (unsigned Flags = MI.getFlags())
Or->setFlags(Flags);
MI.eraseFromParent();
return Legalized;
}

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Show First 20 Lines • Show All 292 Lines • ▼ Show 20 Lines getActionDefinitionsBuilder(G_FPTRUNC)
.legalFor({{S32, S64}, {S16, S32}}) .legalFor({{S32, S64}, {S16, S32}})
.scalarize(0); .scalarize(0);
getActionDefinitionsBuilder(G_FPEXT) getActionDefinitionsBuilder(G_FPEXT)
.legalFor({{S64, S32}, {S32, S16}}) .legalFor({{S64, S32}, {S32, S16}})
.lowerFor({{S64, S16}}) // FIXME: Implement .lowerFor({{S64, S16}}) // FIXME: Implement
.scalarize(0); .scalarize(0);
getActionDefinitionsBuilder(G_FCOPYSIGN) // TODO: Verify V_BFI_B32 is generated from expanded bit ops.
.legalForCartesianProduct({S16, S32, S64}, {S16, S32, S64}) getActionDefinitionsBuilder(G_FCOPYSIGN).lower();
.scalarize(0);
getActionDefinitionsBuilder(G_FSUB) getActionDefinitionsBuilder(G_FSUB)
// Use actual fsub instruction // Use actual fsub instruction
.legalFor({S32}) .legalFor({S32})
// Must use fadd + fneg // Must use fadd + fneg
.lowerFor({S64, S16, V2S16}) .lowerFor({S64, S16, V2S16})
.scalarize(0) .scalarize(0)
.clampScalar(0, S32, S64); .clampScalar(0, S32, S64);
▲ Show 20 Lines • Show All 953 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s
--- ---
name: test_copysign_s16_s16 name: test_copysign_s16_s16
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s16_s16 ; SI-LABEL: name: test_copysign_s16_s16
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16) ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; SI: $vgpr0 = COPY [[COPY7]](s32)
; VI-LABEL: name: test_copysign_s16_s16 ; VI-LABEL: name: test_copysign_s16_s16
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16) ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; VI: $vgpr0 = COPY [[ANYEXT]](s32) ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; VI: $vgpr0 = COPY [[COPY7]](s32)
; GFX9-LABEL: name: test_copysign_s16_s16 ; GFX9-LABEL: name: test_copysign_s16_s16
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16) ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; GFX9: $vgpr0 = COPY [[COPY7]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0 %2:_(s16) = G_TRUNC %0
%3:_(s16) = G_TRUNC %1 %3:_(s16) = G_TRUNC %1
%4:_(s16) = G_FCOPYSIGN %2, %3 %4:_(s16) = G_FCOPYSIGN %2, %3
%5:_(s32) = G_ANYEXT %4 %5:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5 $vgpr0 = COPY %5
... ...
--- ---
name: test_copysign_s32_s32 name: test_copysign_s32_s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s32_s32 ; SI-LABEL: name: test_copysign_s32_s32
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s32 ; VI-LABEL: name: test_copysign_s32_s32
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s32 ; GFX9-LABEL: name: test_copysign_s32_s32
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s32) = G_FCOPYSIGN %0, %1 %2:_(s32) = G_FCOPYSIGN %0, %1
$vgpr0 = COPY %2 $vgpr0 = COPY %2
... ...
--- ---
name: test_copysign_s64_s64 name: test_copysign_s64_s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; SI-LABEL: name: test_copysign_s64_s64 ; SI-LABEL: name: test_copysign_s64_s64
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s64 ; VI-LABEL: name: test_copysign_s64_s64
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s64 ; GFX9-LABEL: name: test_copysign_s64_s64
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1 %0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = COPY $vgpr2_vgpr3 %1:_(s64) = COPY $vgpr2_vgpr3
%2:_(s64) = G_FCOPYSIGN %0, %1 %2:_(s64) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1 = COPY %2 $vgpr0_vgpr1 = COPY %2
... ...
--- ---
name: test_copysign_s64_s32 name: test_copysign_s64_s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_copysign_s64_s32 ; SI-LABEL: name: test_copysign_s64_s32
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s32 ; VI-LABEL: name: test_copysign_s64_s32
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s32 ; GFX9-LABEL: name: test_copysign_s64_s32
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32) ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1 %0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2 %1:_(s32) = COPY $vgpr2
%2:_(s64) = G_FCOPYSIGN %0, %1 %2:_(s64) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1 = COPY %2 $vgpr0_vgpr1 = COPY %2
... ...
--- ---
name: test_copysign_s32_s64 name: test_copysign_s32_s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1_vgpr2 liveins: $vgpr0, $vgpr1_vgpr2
; SI-LABEL: name: test_copysign_s32_s64 ; SI-LABEL: name: test_copysign_s32_s64
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s64 ; VI-LABEL: name: test_copysign_s32_s64
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s64 ; GFX9-LABEL: name: test_copysign_s32_s64
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s64) = COPY $vgpr1_vgpr2 %1:_(s64) = COPY $vgpr1_vgpr2
%2:_(s32) = G_FCOPYSIGN %0, %1 %2:_(s32) = G_FCOPYSIGN %0, %1
$vgpr0 = COPY %2 $vgpr0 = COPY %2
... ...
--- ---
name: test_copysign_s16_s32 name: test_copysign_s16_s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s16_s32 ; SI-LABEL: name: test_copysign_s16_s32
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; SI: $vgpr0 = COPY [[COPY8]](s32)
; VI-LABEL: name: test_copysign_s16_s32 ; VI-LABEL: name: test_copysign_s16_s32
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; VI: $vgpr0 = COPY [[ANYEXT]](s32) ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; VI: $vgpr0 = COPY [[COPY8]](s32)
; GFX9-LABEL: name: test_copysign_s16_s32 ; GFX9-LABEL: name: test_copysign_s16_s32
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; GFX9: $vgpr0 = COPY [[COPY8]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0 %2:_(s16) = G_TRUNC %0
%3:_(s16) = G_FCOPYSIGN %2, %1 %3:_(s16) = G_FCOPYSIGN %2, %1
%4:_(s32) = G_ANYEXT %3 %4:_(s32) = G_ANYEXT %3
$vgpr0 = COPY %4 $vgpr0 = COPY %4
... ...
--- ---
name: test_copysign_s32_s16 name: test_copysign_s32_s16
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s32_s16 ; SI-LABEL: name: test_copysign_s32_s16
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s16 ; VI-LABEL: name: test_copysign_s32_s16
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s16 ; GFX9-LABEL: name: test_copysign_s32_s16
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32) ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %1 %2:_(s16) = G_TRUNC %1
%3:_(s32) = G_FCOPYSIGN %0, %2 %3:_(s32) = G_FCOPYSIGN %0, %2
$vgpr0 = COPY %3 $vgpr0 = COPY %3
... ...
--- ---
name: test_copysign_s64_s16 name: test_copysign_s64_s16
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; SI-LABEL: name: test_copysign_s64_s16 ; SI-LABEL: name: test_copysign_s64_s16
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s16 ; VI-LABEL: name: test_copysign_s64_s16
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s16 ; GFX9-LABEL: name: test_copysign_s64_s16
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16) ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64) ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1 %0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2 %1:_(s32) = COPY $vgpr2
%2:_(s16) = G_TRUNC %1 %2:_(s16) = G_TRUNC %1
%3:_(s64) = G_FCOPYSIGN %0, %2 %3:_(s64) = G_FCOPYSIGN %0, %2
$vgpr0_vgpr1 = COPY %3 $vgpr0_vgpr1 = COPY %3
... ...
--- ---
name: test_copysign_s16_s64 name: test_copysign_s16_s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1_vgpr2 liveins: $vgpr0, $vgpr1_vgpr2
; SI-LABEL: name: test_copysign_s16_s64 ; SI-LABEL: name: test_copysign_s16_s64
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; SI: $vgpr0 = COPY [[COPY7]](s32)
; VI-LABEL: name: test_copysign_s16_s64 ; VI-LABEL: name: test_copysign_s16_s64
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; VI: $vgpr0 = COPY [[ANYEXT]](s32) ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; VI: $vgpr0 = COPY [[COPY7]](s32)
; GFX9-LABEL: name: test_copysign_s16_s64 ; GFX9-LABEL: name: test_copysign_s16_s64
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16) ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
; GFX9: $vgpr0 = COPY [[COPY7]](s32)
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s64) = COPY $vgpr1_vgpr2 %1:_(s64) = COPY $vgpr1_vgpr2
%2:_(s16) = G_TRUNC %0 %2:_(s16) = G_TRUNC %0
%3:_(s16) = G_FCOPYSIGN %2, %1 %3:_(s16) = G_FCOPYSIGN %2, %1
%4:_(s32) = G_ANYEXT %3 %4:_(s32) = G_ANYEXT %3
$vgpr0 = COPY %4 $vgpr0 = COPY %4
... ...
--- ---
name: test_copysign_v2s16_v2s16 name: test_copysign_v2s16_v2s16
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_v2s16_v2s16 ; SI-LABEL: name: test_copysign_v2s16_v2s16
; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; SI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; SI: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>) ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16) ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16) ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
; SI: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; SI: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; SI: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0 = COPY [[OR]](<2 x s16>)
; VI-LABEL: name: test_copysign_v2s16_v2s16 ; VI-LABEL: name: test_copysign_v2s16_v2s16
; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; VI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; VI: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>) ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16) ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16) ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
; VI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
; VI: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; VI: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; VI: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0 = COPY [[OR]](<2 x s16>)
; GFX9-LABEL: name: test_copysign_v2s16_v2s16 ; GFX9-LABEL: name: test_copysign_v2s16_v2s16
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; GFX9: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; GFX9: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>) ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16) ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16) ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
; GFX9: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
; GFX9: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; GFX9: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; GFX9: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0 = COPY [[OR]](<2 x s16>)
%0:_(<2 x s16>) = COPY $vgpr0 %0:_(<2 x s16>) = COPY $vgpr0
%1:_(<2 x s16>) = COPY $vgpr1 %1:_(<2 x s16>) = COPY $vgpr1
%2:_(<2 x s16>) = G_FCOPYSIGN %0, %1 %2:_(<2 x s16>) = G_FCOPYSIGN %0, %1
$vgpr0 = COPY %2 $vgpr0 = COPY %2
... ...
--- ---
name: test_copysign_v2s32_v2s32 name: test_copysign_v2s32_v2s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; SI-LABEL: name: test_copysign_v2s32_v2s32 ; SI-LABEL: name: test_copysign_v2s32_v2s32
; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; SI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; SI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; SI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; VI-LABEL: name: test_copysign_v2s32_v2s32 ; VI-LABEL: name: test_copysign_v2s32_v2s32
; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; VI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; VI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; VI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; GFX9-LABEL: name: test_copysign_v2s32_v2s32 ; GFX9-LABEL: name: test_copysign_v2s32_v2s32
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; GFX9: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; GFX9: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
; GFX9: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(<2 x s32>) = COPY $vgpr2_vgpr3 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
%2:_(<2 x s32>) = G_FCOPYSIGN %0, %1 %2:_(<2 x s32>) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1 = COPY %2 $vgpr0_vgpr1 = COPY %2
... ...
--- ---
name: test_copysign_v2s64_v2s64 name: test_copysign_v2s64_v2s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
; SI-LABEL: name: test_copysign_v2s64_v2s64 ; SI-LABEL: name: test_copysign_v2s64_v2s64
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
; VI-LABEL: name: test_copysign_v2s64_v2s64 ; VI-LABEL: name: test_copysign_v2s64_v2s64
; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
; VI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
; GFX9-LABEL: name: test_copysign_v2s64_v2s64 ; GFX9-LABEL: name: test_copysign_v2s64_v2s64
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
; GFX9: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 %1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
%2:_(<2 x s64>) = G_FCOPYSIGN %0, %1 %2:_(<2 x s64>) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
... ...
--- ---
name: test_copysign_v2s64_v2s32 name: test_copysign_v2s64_v2s32
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5
; SI-LABEL: name: test_copysign_v2s64_v2s32 ; SI-LABEL: name: test_copysign_v2s64_v2s32
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
; VI-LABEL: name: test_copysign_v2s64_v2s32 ; VI-LABEL: name: test_copysign_v2s64_v2s32
; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; VI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
; GFX9-LABEL: name: test_copysign_v2s64_v2s32 ; GFX9-LABEL: name: test_copysign_v2s64_v2s32
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32) ; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32) ; GFX9: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64) ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
; GFX9: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s32>) = COPY $vgpr4_vgpr5 %1:_(<2 x s32>) = COPY $vgpr4_vgpr5
%2:_(<2 x s64>) = G_FCOPYSIGN %0, %1 %2:_(<2 x s64>) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
... ...
--- ---
name: test_copysign_v2s32_v2s64 name: test_copysign_v2s32_v2s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5
; SI-LABEL: name: test_copysign_v2s32_v2s64 ; SI-LABEL: name: test_copysign_v2s32_v2s64
; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; SI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
; SI: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
; SI: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
; SI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
; SI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; SI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; VI-LABEL: name: test_copysign_v2s32_v2s64 ; VI-LABEL: name: test_copysign_v2s32_v2s64
; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; VI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
; VI: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
; VI: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
; VI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
; VI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; VI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; GFX9-LABEL: name: test_copysign_v2s32_v2s64 ; GFX9-LABEL: name: test_copysign_v2s32_v2s64
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64) ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64) ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32) ; GFX9: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
; GFX9: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
; GFX9: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
; GFX9: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
; GFX9: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5 %1:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
%2:_(<2 x s32>) = G_FCOPYSIGN %0, %1 %2:_(<2 x s32>) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1 = COPY %2 $vgpr0_vgpr1 = COPY %2
... ...
---
name: test_copysign_s32_s32_flagss
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s32_s32_flagss
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; SI: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
; SI: $vgpr0 = COPY %2(s32)
; VI-LABEL: name: test_copysign_s32_s32_flagss
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; VI: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
; VI: $vgpr0 = COPY %2(s32)
; GFX9-LABEL: name: test_copysign_s32_s32_flagss
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; GFX9: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
; GFX9: $vgpr0 = COPY %2(s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = nnan G_FCOPYSIGN %0, %1
$vgpr0 = COPY %2
...
---
name: test_copysign_s32_s16_flags
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s32_s16_flags
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; SI: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
; SI: $vgpr0 = COPY %3(s32)
; VI-LABEL: name: test_copysign_s32_s16_flags
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; VI: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
; VI: $vgpr0 = COPY %3(s32)
; GFX9-LABEL: name: test_copysign_s32_s16_flags
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
; GFX9: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
; GFX9: $vgpr0 = COPY %3(s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %1
%3:_(s32) = nnan G_FCOPYSIGN %0, %2
$vgpr0 = COPY %3
...
---
name: test_copysign_s16_s32_flags
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; SI-LABEL: name: test_copysign_s16_s32_flags
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; SI: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
; SI: $vgpr0 = COPY [[COPY8]](s32)
; VI-LABEL: name: test_copysign_s16_s32_flags
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; VI: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
; VI: $vgpr0 = COPY [[COPY8]](s32)
; GFX9-LABEL: name: test_copysign_s16_s32_flags
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
; GFX9: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
; GFX9: $vgpr0 = COPY [[COPY8]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
%3:_(s16) = nnan G_FCOPYSIGN %2, %1
%4:_(s32) = G_ANYEXT %3
$vgpr0 = COPY %4
...

test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir

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name: test_frint_s64 name: test_frint_s64
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; SI-LABEL: name: test_frint_s64 ; SI-LABEL: name: test_frint_s64
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000 ; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[COPY]](s64) ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[FCOPYSIGN]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN]] ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[OR]]
; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]] ; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]] ; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]]
; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]] ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[COPY]], [[FADD1]] ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[COPY]], [[FADD1]]
; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]] ; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
; SI: $vgpr0_vgpr1 = COPY [[FRINT]](s64) ; SI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
; CI-LABEL: name: test_frint_s64 ; CI-LABEL: name: test_frint_s64
; CI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; CI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]] ; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
; CI: $vgpr0_vgpr1 = COPY [[FRINT]](s64) ; CI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1 %0:_(s64) = COPY $vgpr0_vgpr1
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body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3 liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; SI-LABEL: name: test_frint_v2s64 ; SI-LABEL: name: test_frint_v2s64
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000 ; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[UV]](s64) ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[FCOPYSIGN]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN]] ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[COPY1]]
; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY1]]
; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]] ; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[UV]] ; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[UV]]
; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]] ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[UV]], [[FADD1]] ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[UV]], [[FADD1]]
; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]] ; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[UV1]](s64) ; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[OR]]
; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[FCOPYSIGN1]] ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN1]]
; SI: [[FADD3:%[0-9]+]]:_(s64) = G_FADD [[FADD2]], [[FNEG1]] ; SI: [[FADD3:%[0-9]+]]:_(s64) = G_FADD [[FADD2]], [[FNEG1]]
; SI: [[FABS1:%[0-9]+]]:_(s64) = G_FABS [[UV1]] ; SI: [[FABS1:%[0-9]+]]:_(s64) = G_FABS [[UV1]]
; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C1]] ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[UV1]], [[FADD3]] ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[UV1]], [[FADD3]]
; SI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]] ; SI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64) ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
; CI-LABEL: name: test_frint_v2s64 ; CI-LABEL: name: test_frint_v2s64
; CI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; CI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) ; CI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]] ; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
; CI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]] ; CI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64) ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s64>) = G_FRINT %0 %1:_(<2 x s64>) = G_FRINT %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
... ...