[NewPM] Port the MachineCSE pass to the new PM.

[czhang]

rebase & clang-format

[czhang]

Rebase

[czhang]

Place machine-cse registration here.

llvm/include/llvm/CodeGen/MachineCSE.h

+//===- MachineCSE.h - Machine Common Subexpression Elimination Pass -----===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This pass performs global common subexpression elimination on machine
+// instructions using a scoped hash table based value numbering scheme. It
+// must be run while the machine function is still in SSA form.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_MACHINE_CSE_H
+#define LLVM_CODEGEN_MACHINE_CSE_H
+
+#include "llvm/CodeGen/PassManager.h"
+#include "llvm/IR/PassManager.h"
+
+namespace llvm {
+
+struct MachineCSEPass : PassInfoMixin<MachineCSEPass> {
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &AM);
+};
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_MACHINE_CSE_H

llvm/include/llvm/InitializePasses.h

 void initializeLowerSwitchPass(PassRegistry&);
 void initializeLowerTypeTestsPass(PassRegistry&);
 void initializeMIRCanonicalizerPass(PassRegistry &);
 void initializeMIRPrintingPassPass(PassRegistry&);
 void initializeMachineBlockFrequencyInfoPass(PassRegistry&);
 void initializeMachineBlockPlacementPass(PassRegistry&);
 void initializeMachineBlockPlacementStatsPass(PassRegistry&);
 void initializeMachineBranchProbabilityInfoPass(PassRegistry&);
-void initializeMachineCSEPass(PassRegistry&);
+void initializeMachineCSELegacyPassPass(PassRegistry &);
 void initializeMachineCombinerPass(PassRegistry&);
 void initializeMachineCopyPropagationLegacyPassPass(PassRegistry &);
 void initializeMachineDominanceFrontierPass(PassRegistry&);
 void initializeMachineDominatorTreeWrapperPassPass(PassRegistry &);
 void initializeMachineFunctionPrinterPassPass(PassRegistry&);
 void initializeMachineLICMPass(PassRegistry&);
 void initializeMachineLoopInfoPass(PassRegistry&);
 void initializeMachineModuleInfoWrapperPassPass(PassRegistry &);

llvm/lib/CodeGen/CodeGen.cpp

void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeLiveStacksPass(Registry);
   initializeLiveVariablesPass(Registry);
   initializeLocalStackSlotPassPass(Registry);
   initializeLowerIntrinsicsPass(Registry);
   initializeMIRCanonicalizerPass(Registry);
   initializeMachineBlockFrequencyInfoPass(Registry);
   initializeMachineBlockPlacementPass(Registry);
   initializeMachineBlockPlacementStatsPass(Registry);
-  initializeMachineCSEPass(Registry);
+  initializeMachineCSELegacyPassPass(Registry);
   initializeMachineCombinerPass(Registry);
   initializeMachineCopyPropagationLegacyPassPass(Registry);
   initializeMachineDominatorTreeWrapperPassPass(Registry);
   initializeMachineFunctionPrinterPassPass(Registry);
   initializeMachineLICMPass(Registry);
   initializeMachineLoopInfoPass(Registry);
   initializeMachineModuleInfoWrapperPassPass(Registry);
   initializeMachineOptimizationRemarkEmitterPassPass(Registry);

llvm/lib/CodeGen/MachineCSE.cpp

 //===- MachineCSE.cpp - Machine Common Subexpression Elimination Pass -----===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This pass performs global common subexpression elimination on machine
 // instructions using a scoped hash table based value numbering scheme. It
 // must be run while the machine function is still in SSA form.
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/MachineCSE.h"
+
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/ScopedHashTable.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/CFG.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/PassManager.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetOpcodes.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/MC/MCInstrDesc.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/Pass.h"

 STATISTIC(NumPhysCSEs,
           "Number of physreg referencing common subexpr eliminated");
 STATISTIC(NumCrossBBCSEs,
           "Number of cross-MBB physreg referencing CS eliminated");
 STATISTIC(NumCommutes,  "Number of copies coalesced after commuting");
 
 namespace {
 
-  class MachineCSE : public MachineFunctionPass {
-    const TargetInstrInfo *TII;
-    const TargetRegisterInfo *TRI;
-    AliasAnalysis *AA;
-    MachineDominatorTree *DT;
-    MachineRegisterInfo *MRI;
+class MachineCSE {
 
-  public:
-    static char ID; // Pass identification
-
-    MachineCSE() : MachineFunctionPass(ID) {
-      initializeMachineCSEPass(*PassRegistry::getPassRegistry());
-    }
-
-    bool runOnMachineFunction(MachineFunction &MF) override;
-
-    void getAnalysisUsage(AnalysisUsage &AU) const override {
-      AU.setPreservesCFG();
-      MachineFunctionPass::getAnalysisUsage(AU);
-      AU.addRequired<AAResultsWrapperPass>();
-      AU.addPreservedID(MachineLoopInfoID);
-      AU.addRequired<MachineDominatorTree>();
-      AU.addPreserved<MachineDominatorTree>();
-    }
+  MachineCSE(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
+             AliasAnalysis *AA, MachineDominatorTree *DT,
+             MachineRegisterInfo *MRI)
+      : TII(TII), TRI(TRI), AA(AA), DT(DT), MRI(MRI) {
+    LookAheadLimit = TII->getMachineCSELookAheadLimit();
 
-    void releaseMemory() override {
-      ScopeMap.clear();
-      PREMap.clear();
-      Exps.clear();
-    }
+  ~MachineCSE() {
 
+  bool PerformCSE(MachineDomTreeNode *Node);
+  bool PerformSimplePRE(MachineDominatorTree *DT);
+
   private:
     using AllocatorTy = RecyclingAllocator<BumpPtrAllocator,
                             ScopedHashTableVal<MachineInstr *, unsigned>>;
     using ScopedHTType =
         ScopedHashTable<MachineInstr *, unsigned, MachineInstrExpressionTrait,
                         AllocatorTy>;
     using ScopeType = ScopedHTType::ScopeTy;
     using PhysDefVector = SmallVector<std::pair<unsigned, unsigned>, 2>;
private:
     bool isCSECandidate(MachineInstr *MI);
     bool isProfitableToCSE(unsigned CSReg, unsigned Reg,
                            MachineBasicBlock *CSBB, MachineInstr *MI);
     void EnterScope(MachineBasicBlock *MBB);
     void ExitScope(MachineBasicBlock *MBB);
     bool ProcessBlockCSE(MachineBasicBlock *MBB);
     void ExitScopeIfDone(MachineDomTreeNode *Node,
                          DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren);
-    bool PerformCSE(MachineDomTreeNode *Node);
 
     bool isPRECandidate(MachineInstr *MI);
     bool ProcessBlockPRE(MachineDominatorTree *MDT, MachineBasicBlock *MBB);
-    bool PerformSimplePRE(MachineDominatorTree *DT);
-  };
+  };
+
+class MachineCSELegacyPass : public MachineFunctionPass {
+public:
+  static char ID; // Pass identification
+
+  MachineCSELegacyPass() : MachineFunctionPass(ID) {
+    initializeMachineCSELegacyPassPass(*PassRegistry::getPassRegistry());
+  }
+
+  bool runOnMachineFunction(MachineFunction &MF) override;
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+    AU.addRequired<AAResultsWrapperPass>();
+    AU.addPreservedID(MachineLoopInfoID);
+    AU.addRequired<MachineDominatorTreeWrapperPass>();
+    AU.addPreserved<MachineDominatorTreeWrapperPass>();
+  }
 
 } // end anonymous namespace
 
-char MachineCSE::ID = 0;
+char MachineCSELegacyPass::ID = 0;
 
-char &llvm::MachineCSEID = MachineCSE::ID;
+char &llvm::MachineCSEID = MachineCSELegacyPass::ID;
 
-INITIALIZE_PASS_BEGIN(MachineCSE, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(MachineCSELegacyPass, DEBUG_TYPE,
                       "Machine Common Subexpression Elimination", false, false)
 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
-INITIALIZE_PASS_END(MachineCSE, DEBUG_TYPE,
+INITIALIZE_PASS_END(MachineCSELegacyPass, DEBUG_TYPE,
                     "Machine Common Subexpression Elimination", false, false)
 
 /// The source register of a COPY machine instruction can be propagated to all
 /// its users, and this propagation could increase the probability of finding
 /// common subexpressions. If the COPY has only one user, the COPY itself can
 /// be removed.
 bool MachineCSE::PerformTrivialCopyPropagation(MachineInstr *MI,
                                                MachineBasicBlock *MBB) {
do {
     MachineBasicBlock *MBB = Node->getBlock();
     Changed |= ProcessBlockPRE(DT, MBB);
 
   } while (!BBs.empty());
 
   return Changed;
 }
 
-bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
+bool MachineCSELegacyPass::runOnMachineFunction(MachineFunction &MF) {
   if (skipFunction(MF.getFunction()))
     return false;
 
-  TII = MF.getSubtarget().getInstrInfo();
-  TRI = MF.getSubtarget().getRegisterInfo();
-  MRI = &MF.getRegInfo();
-  AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
-  DT = &getAnalysis<MachineDominatorTree>();
-  LookAheadLimit = TII->getMachineCSELookAheadLimit();
-  bool ChangedPRE, ChangedCSE;
-  ChangedPRE = PerformSimplePRE(DT);
-  ChangedCSE = PerformCSE(DT->getRootNode());
+  MachineDominatorTree *DT =
+      &getAnalysis<MachineDominatorTreeWrapperPass>().getMachineDominatorTree();
+
+  MachineCSE MCSE(MF.getSubtarget().getInstrInfo(),
+                  MF.getSubtarget().getRegisterInfo(),
+                  &getAnalysis<AAResultsWrapperPass>().getAAResults(), DT,
+                  &MF.getRegInfo());
+
+  bool ChangedPRE = MCSE.PerformSimplePRE(DT);
+  bool ChangedCSE = MCSE.PerformCSE(DT->getRootNode());
   return ChangedPRE || ChangedCSE;
 }
+
+PreservedAnalyses MachineCSEPass::run(MachineFunction &MF,
+                                      MachineFunctionAnalysisManager &AM) {
+  MachineDominatorTree *DT = &AM.getResult<MachineDominatorTreeAnalysis>(MF);
+
+  MachineCSE MCSE(MF.getSubtarget().getInstrInfo(),
+                  MF.getSubtarget().getRegisterInfo(),
+                  AM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
+                      .getManager()
+                      .getCachedResult<AAManager>(
+                          *const_cast<Function *>(&MF.getFunction())),
+                  DT, &MF.getRegInfo());
+
+  bool ChangedPRE = MCSE.PerformSimplePRE(DT);
+  bool ChangedCSE = MCSE.PerformCSE(DT->getRootNode());
+
+  if (!ChangedPRE && !ChangedCSE)
+    return PreservedAnalyses::all();
+
+  PreservedAnalyses PA;
+  PA.preserveSet<CFGAnalyses>();
+  PA.preserve<MachineDominatorTreeAnalysis>();
+
+  return PA;
+}

llvm/lib/Passes/PassRegistry.def

 MACHINE_FUNCTION_ANALYSIS("machine-domtree", MachineDominatorTreeAnalysis())
 #undef MACHINE_FUNCTION_ANALYSIS
 
 #ifndef MACHINE_FUNCTION_PASS
 #define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
 #endif
 MACHINE_FUNCTION_PASS("machine-cp", MachineCopyPropagationPass())
 MACHINE_FUNCTION_PASS("finalize-isel", FinalizeISelPass())
+MACHINE_FUNCTION_PASS("machine-cse", MachineCSEPass())
 #undef MACHINE_FUNCTION_PASS