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[ARM] Fix MVE_VQxDMLxDH instruction class
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Authored by miyuki on Jul 1 2019, 6:37 AM.

Details

Summary

According to the ARMARM, the VQDMLADH, VQRDMLADH, VQDMLSDH and
VQRDMLSDH instructions handle their results as follows: "The base
variant writes the results into the lower element of each pair of
elements in the destination register, whereas the exchange variant
writes to the upper element in each pair". I.e., the initial content
of the output register affects the result, as usual, we model this
with an additional input.

Also, for 32-bit variants Qd is not allowed to be the same register as
Qm and Qn, we use @earlyclobber to indicate this.

This patch also changes vpred_r to vpred_n because the instructions
don't have an explicit 'inactive' operand.

Diff Detail

Repository
rL LLVM

Event Timeline

miyuki created this revision.Jul 1 2019, 6:37 AM
simon_tatham accepted this revision.Jul 1 2019, 8:53 AM
This revision is now accepted and ready to land.Jul 1 2019, 8:53 AM
This revision was automatically updated to reflect the committed changes.