[CodeGen] Add missing vector type legalization for ctlz_zero_undef

[RolandF]

Summary

The change to PPC vector cost model for D60160 exposed a regression where the support for legalizing a vector ctlz_zero_undef with illegal type was missing.

[craig.topper]

Looks like we can hit the same issue in X86 with -x86-experimental-vector-widening-legalization on the command line. Do you mind adding a test for that?

[RolandF]

Add X86 test.

[RKSimon]

llvm/test/CodeGen/X86/vec_clz.ll

1 ↗

(On Diff #205399)

Please can you use update_llc_test_checks.py to regenerate this? (and maybe the ppc file as well)

[RolandF]

Generated test checks with script.

[RKSimon]

LGTM

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

#endif
   // (they are probably not destined to become libcalls), then widen those like
   // any other unary ops.
   LLVM_FALLTHROUGH;
 
   case ISD::ABS:
   case ISD::BITREVERSE:
   case ISD::BSWAP:
   case ISD::CTLZ:
+  case ISD::CTLZ_ZERO_UNDEF:
   case ISD::CTPOP:
   case ISD::CTTZ:
+  case ISD::CTTZ_ZERO_UNDEF:
   case ISD::FNEG:
   case ISD::FCANONICALIZE:
     Res = WidenVecRes_Unary(N);
     break;
   case ISD::FMA:
     Res = WidenVecRes_Ternary(N);
     break;
   }

llvm/test/CodeGen/PowerPC/vec_clz.ll

 
 define <2 x i64> @test_v2i64(<2 x i64> %x) nounwind readnone {
        %vcnt = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x)
        ret <2 x i64> %vcnt
 ; CHECK: @test_v2i64
 ; CHECK: vclzd 2, 2
 ; CHECK: blr
 }
+
+declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg)
+
+define <2 x i32> @illegal_ctlz(<2 x i32> %v1) {
+  %v2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %v1, i1 true)
+  ret <2 x i32> %v2
+}
+; CHECK-LABEL: @illegal_ctlz
+; CHECK: vclzw
+
+declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1 immarg)
+
+define <2 x i32> @illegal_cttz(<2 x i32> %v1) {
+  %v2 = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %v1, i1 true)
+  ret <2 x i32> %v2
+}
+; CHECK-LABEL: @illegal_cttz
+; CHECK: vpopcntw